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461 Commits

Author SHA1 Message Date
Matthias Koefferlein a14ca01bac WIP: more on deep edge collections. 2019-02-10 15:33:14 +01:00
Matthias Koefferlein f22217b6c4 WIP: deep edges and edge pairs. 2019-02-10 10:22:47 +01:00
Matthias Koefferlein 4abc38a5cc Test for deep/flat collaboration 2019-02-10 08:28:48 +01:00
Matthias Koefferlein e8e45b7272 Some tests, smooth and round method of deep region 2019-02-09 23:51:35 +01:00
Matthias Koefferlein 7a86f0d878 Bugfix: size method needs to produce polygon refs so the output is usable as input for booleans too. 2019-02-09 22:55:34 +01:00
Matthias Koefferlein b6dd149f53 Changed variant suffix to to be consistent with cell name suffix generation in KLayout. 2019-02-09 19:21:14 +01:00
Matthias Koefferlein 1f3af7bbfe Hierarchical area and perimeter and sizing 
Area and perimeter computation happens hierarchically
now. Magnified instances are supported.

Sizing is implemented hierarchically.

For anisotropic sizing, orientation variants may be
generated. For both isotropic and anisotropic
magnification variants will be created.
 2019-02-09 19:13:54 +01:00
Matthias Koefferlein bbf7b2768b WIP: cell variant collecting and building. 2019-02-09 16:29:34 +01:00
Matthias Koefferlein 50c8c067d5 WIP: cell variant formation utility class. 2019-02-07 23:13:23 +01:00
Matthias Koefferlein decc5ede13 Robustification of Region 
- Tests for merge
- Locking the layout when writing back the data for
  performance improvement
 2019-02-05 23:39:31 +01:00
Matthias Koefferlein 7c043dbb99 WIP: fixed DeepRegion implementation somewhat. Needs testing. 2019-02-05 00:25:32 +01:00
Matthias Koefferlein 981d668161 WIP: introduced hierarchical merge and some other hierarchical operations. 2019-02-04 23:43:19 +01:00
Matthias Koefferlein 9c0123df20 Implemented implicit joining of nets with the same label. 2019-02-03 21:34:23 +01:00
Matthias Koefferlein 3f1cd226a5 Made net name optional in l2n format. 2019-02-03 13:33:58 +01:00
Matthias Koefferlein f9c33733b9 l2n format writer and reader: more compact output 2019-02-03 01:49:48 +01:00
Matthias Koefferlein 1ea687d7b7 More details control over verbosity of region ops 
Plus: the region op control attributes (threads,
min_coherence etc.) got lost when replacing the
delegate of a region. Now they are maintained in
most cases.
 2019-02-03 01:48:14 +01:00
Matthias Koefferlein 99f111fe01 Attempt to achieve reproducibility between MSVC and gcc 
Applies to dbHierProcessor.cc:

The issue was related to std::unordered_set/map which
(as the name says) is not ordered. The output of the
boolean core computation step is currently dependent
on the order (it's single pass), hence the order of
the contexts matters.

Using ordered sets where possible and explicit
sorting might help.
 2019-02-02 22:43:42 +01:00
Matthias Koefferlein 5daf34ed76 Merge remote-tracking branch 'origin/windows-compat' into dvb 2019-02-02 02:36:14 +01:00
klayoutmatthias 1a080cc4d7 Windows build compatibility. 2019-02-02 02:33:48 +01:00
Matthias Koefferlein c90f7e4af9 Introduced perimeter parameters for MOS3/MOS4 2019-02-02 01:29:28 +01:00
Matthias Koefferlein 11cfe36ed1 Some MSVC build issues fixed (hopefully) 2019-02-01 23:18:54 +01:00
Matthias Koefferlein f2fff5cca1 Fixed compile issue. 2019-02-01 00:00:10 +01:00
Matthias Koefferlein efe06046aa Bugfixes (dbu, global nets) 
1.) Fixed bug on build_nets when DBU's of target
    and source layout were different

2.) Global nets of subcircuits need to be considered
    also when they are already connected through other
    connections.
 2019-01-31 23:50:34 +01:00
Matthias Koefferlein 57305977a4 Spice writer delegate fix 
- Changed to const & objects in the Spice writer delegate
  to non-const & for Ruby/Python reimplementation (as const/non-const
  ambiguity is an issue for Ruby/Python we cannot efficiently
  work with const refs)
- Updated test data because the previous implementation wasn't
  using refs but rather copies of device and device class
  objects.
 2019-01-31 22:23:58 +01:00
Matthias Koefferlein 4068478887 Implemented SPICE writer + tests. 2019-01-31 00:07:10 +01:00
Matthias Koefferlein 7d06ea83c1 Bugfix: a segfault happened during net cluster formation because make_path was messing up the memory layout of the cluster collections. 2019-01-28 21:29:34 +01:00
Matthias Koefferlein 7e42ff83cd More fine-tuning of verbosity of log output for local processor. 2019-01-28 21:28:23 +01:00
Matthias Koefferlein da8b2854de Some fine-tuning of the timer output verbosity of the edge processor. 2019-01-28 21:27:41 +01:00
Matthias Koefferlein 2da7b218b4 Print errors on log when running device extractor. 2019-01-27 22:01:29 +01:00
Matthias Koefferlein 794c31329a Bugfix: internal error when running netlist extraction. 2019-01-27 22:00:30 +01:00
Matthias Koefferlein 458d00969c Fixed issue #228 
Reason for the problem: the interaction test
has to keep separate "inside" records for both
below and above the scanline, not just once.
With the single record, the step in the
left polygon erased the "inside" condition.
 2019-01-27 00:04:15 +01:00
Matthias Koefferlein fe0d3e28ba Fixed issue #228 
Reason for the problem: the interaction test
has to keep separate "inside" records for both
below and above the scanline, not just once.
With the single record, the step in the
left polygon erased the "inside" condition.
 2019-01-26 23:59:22 +01:00
Matthias Koefferlein 863c6ba8de Fixed a hierarchy traversal bug in the hier processor. 2019-01-26 21:53:44 +01:00
Matthias Koefferlein 4712ee0f29 Activated DeviceAbstract for GSI. 2019-01-25 22:40:41 +01:00
Matthias Koefferlein 29264013b0 WIP: more consistent handling of polygon splitting parameters. 2019-01-25 22:28:25 +01:00
Matthias Koefferlein 12aaa2db20 Refactoring: unified handling of splitting parameters. 2019-01-25 21:48:56 +01:00
Matthias Koefferlein 6da9bc5e85 Updated tests after switching to boolean core. 2019-01-25 21:38:45 +01:00
Matthias Koefferlein 707c761bac WIP: local hierarchical operations: take boolean core rather than shape ref core -> better hierarchical quality. Tests need to be fixed. 2019-01-25 00:21:01 +01:00
Matthias Koefferlein a635435899 Moved some code 2019-01-23 23:39:43 +01:00
Matthias Koefferlein 1cfa3251ce Better reproducibility of results in hier processor: hash function of shape ref takes object hash, not pointer hash 2019-01-23 22:19:28 +01:00
Matthias Koefferlein fba5bed2a3 Performance improvement of device extractor (taking out a O(N**2) loop) 2019-01-23 01:02:22 +01:00
Matthias Koefferlein 68fe668567 WIP: performance improvement. 2019-01-22 07:42:44 +01:00
Matthias Koefferlein 81bf47688e Renamed device model -> device abstract 2019-01-21 22:37:13 +01:00
Matthias Koefferlein d79a448eaa Some performance improvement by eliminating empty objects in the box scanner. 2019-01-21 22:37:02 +01:00
Matthias Koefferlein f83e1dae43 Refactoring, some bugfixes, GSI bindings for L2N methods. 2019-01-20 23:12:27 +01:00
Matthias Koefferlein 4c7f43d749 More l2n reader tests. 2019-01-20 17:31:58 +01:00
Matthias Koefferlein dd39168dc8 WIP: Enabled layout generation from read l2n data. 2019-01-20 02:50:23 +01:00
Matthias Koefferlein a5e2cf58c3 l2n dump format is leaner (device terminal shapes dropped from nets as they are contained in the device abstracts). Some refactoring. 2019-01-19 23:00:19 +01:00
Matthias Koefferlein 8213e71a79 WIP: l2n reader implementation, some bug fixes, refactoring. 2019-01-19 22:19:08 +01:00
Matthias Koefferlein 56bb39a273 LayoutToNetlist enhancements in the area of the dumper. 2019-01-16 22:45:58 +01:00
Matthias Koefferlein 438f50091f WIP: Refined output format for l2n 2019-01-16 00:49:51 +01:00
Matthias Koefferlein 4cb8982ca2 WIP: added concept of device model. 2019-01-15 23:03:25 +01:00
Matthias Koefferlein 5962d66940 WIP: major enhancements with respect to device handling 
The device handling in the netlist extractor was now
entirely moved to device cells. New options are introduced
for exporting these cells. Tests have been updated.
 2019-01-15 21:33:41 +01:00
Matthias Koefferlein 1af81b74d2 WIP: refactoring - turning devices into cells for better backannotation. 2019-01-14 00:59:47 +01:00
Matthias Koefferlein 3b0f4b3d78 WIP: fixed some compiler issues on certain systems. 2019-01-12 00:27:55 +01:00
Matthias Koefferlein baf50bd0b1 WIP: refactoring - singularization of classes in separate files. 2019-01-10 23:36:52 +01:00
Matthias Köfferlein 1144899976
Merge pull request #221 from KLayout/issue-200 
Fixed #200 by introducing layout locking during iteration
 2019-01-09 01:11:49 +01:00
Matthias Koefferlein aeeb6d7c87 Fixed #200 by introducing layout locking during iteration 
The cause for the problem was that the layout got updated
while iterating causing the mess within the iterator.

This solution is to lock the layout while an iterator
is present. This happens for various Cell and Shapes
iterator, so it's a major enhancement.
 2019-01-09 01:06:11 +01:00
Matthias Koefferlein 9fa5618034 Added test for device combination. 2019-01-08 23:49:12 +01:00
Matthias Koefferlein 14cb9090ec Provide operator-- on SortedCellIndexIterator to fix #220 2019-01-08 21:53:10 +01:00
Matthias Koefferlein d4d7ea8022 Updated copyright. 2019-01-08 01:09:25 +01:00
Matthias Koefferlein b0d7f5f7f5 Updated copyright. 2019-01-08 00:58:45 +01:00
Matthias Koefferlein feb2b69aa9 Merge remote-tracking branch 'origin/master' into dvb 2019-01-08 00:49:16 +01:00
Matthias Koefferlein fb4048d317 Added RBA tests for four-terminal MOS extraction plus global nets. 2019-01-08 00:17:58 +01:00
Matthias Koefferlein 294f1701b5 Added a test for joining of layers through multiple global net assignment. 2019-01-07 23:57:52 +01:00
Matthias Koefferlein 315bcdd016 WIP: bugfixed netlist extractor with global nets. 2019-01-07 23:33:57 +01:00
Matthias Koefferlein c80e335cd6 WIP: global nets integration in cluster builder. 2019-01-07 02:08:59 +01:00
Matthias Koefferlein a4f0fd665e Provided a solution for connectivity through global nets. 2019-01-06 17:50:51 +01:00
Matthias Koefferlein 6cf7558384 WIP: preparations for global net extraction 2019-01-06 17:04:13 +01:00
Matthias Koefferlein 64c2548ab8 WIP: first steps towards global nets. 2019-01-06 15:28:40 +01:00
Matthias Koefferlein eb435d5d85 WIP: refactoring - separated pins of net into outgoing and subcircuit. 2019-01-06 12:53:22 +01:00
Matthias Koefferlein 261b14a260 WIP: GSI binding of LayoutToNetlist::build_nets 2019-01-06 02:15:04 +01:00
Matthias Koefferlein 8d51d1e4bb WIP: better optimization of hierarchical net output. 2019-01-06 01:54:36 +01:00
Matthias Koefferlein ec3a3b0f8c WIP: added ability to export nets to layouts. 2019-01-06 01:32:20 +01:00
Matthias Koefferlein bc4f9efa5d One more test for probing with a slightly more complex hierarchy. 2019-01-05 23:21:37 +01:00
Matthias Koefferlein f86f8149eb Fixed a bug that caused a segfault in the Layout2Netlist object (array repo references to original layout rather than to the working layout) 2019-01-05 22:40:53 +01:00
Matthias Koefferlein 15b79c9ddb IMPORTANT BUGFIX: array repo handling 
The issue: when cloning an array, the
"in_repository" flag might be left set. This
makes the system think the array is kept in
a repo. In the best case this creates a
memory leak.
 2019-01-05 21:55:06 +01:00
Matthias Koefferlein 6e468b43e0 WIP: bugfix - local to instance interaction did shortcut too early. 2019-01-05 10:12:55 +01:00
Matthias Koefferlein c31c87916c WIP: bugfix - array reference were not always considered correctly. 2019-01-05 01:34:10 +01:00
Matthias Koefferlein ad6d9b5715 WIP: provide a less memory intensive way to deliver shapes from nets. 2019-01-04 17:41:09 +01:00
Matthias Koefferlein e439d50111 WIP: hier netlist processort: performance improvement in instance-to-instance checking, leaner output of net shapes. 2019-01-04 08:03:31 +01:00
Matthias Koefferlein 72f838f8ee WIP: performance improvement, maximum confinement of interactions by local search area. 2019-01-04 01:22:24 +01:00
Matthias Koefferlein 3fd99407a3 WIP: bugfix - hierarchical net extractor wasn't considering self-interactions between instance array elements. 2019-01-03 23:25:28 +01:00
Matthias Koefferlein 62d9941c4a WIP: Bugfix - hierarchy was dropping instances. 2019-01-03 22:09:19 +01:00
Matthias Koefferlein 20799026d1 WIP: bugfix in net extraction (wrong hierarchy treatment) 2019-01-03 18:26:18 +01:00
Matthias Koefferlein 76330bea3a Save some memory on net shape retrieval. 2019-01-02 23:23:04 +01:00
Matthias Koefferlein ec3198c466 Netlist extraction performance improvement by taking a shortcut for local cluster/child cell cluster interactions. 2019-01-01 22:39:22 +01:00
Matthias Koefferlein 6a710a9efb Fixed an internal error that happened if additional layers got added to the working shape set. 2019-01-01 19:19:53 +01:00
Matthias Koefferlein 7898ec37cd Bugfix: netlist extractor did loose some connections. 2019-01-01 17:23:11 +01:00
Matthias Koefferlein fed7a4bfed Some performance improvement for the net extractor. 2019-01-01 13:07:40 +01:00
Matthias Koefferlein 060abc056e Fixed a memory corruption issue from the Netlist destructor. 2018-12-31 17:33:14 +01:00
Matthias Koefferlein 37d8f0bfca Added hierarchical progress reporting for more detailed progress. 2018-12-31 16:41:32 +01:00
Matthias Koefferlein 509de593e6 Removed a compiler warning. 2018-12-31 01:42:55 +01:00
Matthias Koefferlein 0cc340cf4f Once more being nice to picky compilers ... 2018-12-31 01:09:13 +01:00
Matthias Koefferlein b75125f7c2 Please picky compilers (once more) .. 2018-12-31 00:50:43 +01:00
Matthias Koefferlein e3279b754b Please picky compilers .. 2018-12-31 00:00:15 +01:00
Matthias Koefferlein 9c607d7663 Added a first version of the layout to netlist extraction feature 
The main entry point is RBA::LayoutToNetlist which is the
GSI binding for the layout to netlist extractor. For a first
impression about the abilities of this extractor see the
Ruby tests in testdata/ruby/dbLayoutToNetlist.rb.

The framework itself consists of many classes, specifically

- RBA::Netlist for the netlist representation
- RBA::DeviceClass and superclasses (e.g. RBA::DeviceClassResistor and
  RBA::DeviceClassMOS3Transistor) for the description of devices.
- RBA::DeviceExtractor and superclasses (i.e. RBA::DeviceExtractorMOS3Transistor or
  the generic RBA::GenericDeviceExtractor) for the implementation of the
  device extraction.
- RBA::Connectivity for the description of inter- and intra-layer connections.
 2018-12-30 22:43:56 +01:00
Matthias Koefferlein f989a85642 WIP: introduced Circuit::is_external_net 2018-12-30 18:44:30 +01:00
Matthias Koefferlein 72a140957d WIP: added test for recursive net shape retrieval 2018-12-30 18:22:45 +01:00
Matthias Koefferlein 16a2b1982d WIP: added one more level of abstraction to layout-to-netlist extraction (db::LayoutToNetlist) for easier use. 2018-12-30 17:53:46 +01:00