Commit Graph

290 Commits

Author SHA1 Message Date
Matthias Koefferlein 9ec6b44c93 Added some tests for the previous commit. 2019-02-18 00:15:26 +01:00
Matthias Koefferlein b91edbabde Enabled deep mode for DRC 2019-02-17 23:21:23 +01:00
Matthias Koefferlein 311318c578 Ported edge/edge DRC functions to hierarchical mode. 2019-02-17 18:54:33 +01:00
Matthias Koefferlein c40f147dc7 Edge/edge and edge/polygon interaction test ported to hierarchical mode. 2019-02-17 18:36:15 +01:00
Matthias Koefferlein 7ef0451ca8 Partial segments of edges converted to hierarchical operations. 2019-02-17 17:53:21 +01:00
Matthias Koefferlein 74006b6208 Hierarchical implementation of extended method for edges 2019-02-17 17:34:31 +01:00
Matthias Koefferlein ae783a2245 Hiearchical implementation of edge filter. 2019-02-17 16:18:24 +01:00
Matthias Koefferlein 61d766bd4c Hierarchical implementation of edge to region operations. 2019-02-17 16:05:39 +01:00
Matthias Koefferlein e6ee1c064e Hierarchical implementation of edge/edge booleans. 2019-02-17 15:07:16 +01:00
Matthias Koefferlein 8e5bffcf18 Hierarchical angle check. 2019-02-17 11:42:30 +01:00
Matthias Koefferlein a7bfaac424 Cell variant resolution by propagation, grid check now implementation hierarchically (with propagation) 2019-02-17 10:59:04 +01:00
Matthias Koefferlein 6e35e80963 Hierarchical implementation of polygon vs. edge interact 2019-02-15 23:43:45 +01:00
Matthias Koefferlein 78617930dd Hierarchical implementation of self-overlap merge. 2019-02-13 22:41:12 +01:00
Matthias Koefferlein ddcfda8761 Some optimization: keep merged state in deep region. 2019-02-13 17:17:03 +01:00
Matthias Koefferlein 68947bedd2 Updated golden test data. 2019-02-13 01:11:15 +01:00
Matthias Koefferlein b0fc2be96e Deep regions: some more operations implemented hierarchically
- snap (!) - but only for gx == gy
- filtering
- interact/inside/outside/overlap + not_... variants
- edges
2019-02-13 01:07:32 +01:00
Matthias Koefferlein 7404ad8f3a WIP: added a comment. 2019-02-12 00:10:52 +01:00
Matthias Koefferlein 6404ca6b1d WIP: Deep edge pairs 2019-02-12 00:08:47 +01:00
Matthias Koefferlein 82ad528dbe Added one more testcase for inserting a plain region into a RDB 2019-02-11 19:24:24 +01:00
Matthias Koefferlein 43014d6923 WIP: some testing and bug fixes for hierarchical report db generation. 2019-02-11 00:22:19 +01:00
Matthias Koefferlein 2d9a3aaaa6 WIP: Hierarchical production of error db's. Needs testing. 2019-02-11 00:11:03 +01:00
Matthias Koefferlein d35e86e189 Updated tests after last change (edge transformation behaviour) 2019-02-10 16:21:44 +01:00
Matthias Koefferlein a81a8cdbc8 Modified edge transformation to maintain the orientation paradigm
When the transformation is mirroring, edges now swap their
points to maintain the right-is-inside paradigm.
2019-02-10 16:03:46 +01:00
Matthias Koefferlein 4abc38a5cc Test for deep/flat collaboration 2019-02-10 08:28:48 +01:00
Matthias Koefferlein e8e45b7272 Some tests, smooth and round method of deep region 2019-02-09 23:51:35 +01:00
Matthias Koefferlein 404f0f8328 Added a missing test golden data. 2019-02-09 22:56:44 +01:00
Matthias Koefferlein b6dd149f53 Changed variant suffix to to be consistent with cell name suffix generation in KLayout. 2019-02-09 19:21:14 +01:00
Matthias Koefferlein 1f3af7bbfe Hierarchical area and perimeter and sizing
Area and perimeter computation happens hierarchically
now. Magnified instances are supported.

Sizing is implemented hierarchically.

For anisotropic sizing, orientation variants may be
generated. For both isotropic and anisotropic
magnification variants will be created.
2019-02-09 19:13:54 +01:00
Matthias Koefferlein bbf7b2768b WIP: cell variant collecting and building. 2019-02-09 16:29:34 +01:00
Matthias Koefferlein ac7baf96ff Added golden data for deep region regression test. 2019-02-07 21:08:52 +01:00
Matthias Koefferlein decc5ede13 Robustification of Region
- Tests for merge
- Locking the layout when writing back the data for
  performance improvement
2019-02-05 23:39:31 +01:00
Matthias Koefferlein 9c0123df20 Implemented implicit joining of nets with the same label. 2019-02-03 21:34:23 +01:00
Matthias Koefferlein 3f1cd226a5 Made net name optional in l2n format. 2019-02-03 13:33:58 +01:00
Matthias Koefferlein f9c33733b9 l2n format writer and reader: more compact output 2019-02-03 01:49:48 +01:00
Matthias Koefferlein 99f111fe01 Attempt to achieve reproducibility between MSVC and gcc
Applies to dbHierProcessor.cc:

The issue was related to std::unordered_set/map which
(as the name says) is not ordered. The output of the
boolean core computation step is currently dependent
on the order (it's single pass), hence the order of
the contexts matters.

Using ordered sets where possible and explicit
sorting might help.
2019-02-02 22:43:42 +01:00
Matthias Koefferlein c90f7e4af9 Introduced perimeter parameters for MOS3/MOS4 2019-02-02 01:29:28 +01:00
Matthias Koefferlein 57305977a4 Spice writer delegate fix
- Changed to const & objects in the Spice writer delegate
  to non-const & for Ruby/Python reimplementation (as const/non-const
  ambiguity is an issue for Ruby/Python we cannot efficiently
  work with const refs)
- Updated test data because the previous implementation wasn't
  using refs but rather copies of device and device class
  objects.
2019-01-31 22:23:58 +01:00
Matthias Koefferlein 30e26c4f96 Avoid an issue with virtual functions
Reimplementing virtual functions with
"const &" arguments wasn't behaving as
expected because these arguments were
copied.

Now, "const &" for arguments (in virtual
function reimplementation) is not implemented
as a copy.

In addition, now it's possible to declare
results as references always (also if const &).

See gsiTest.cc:1078 for example:

  //  gsi::arg_make_reference makes the function's return value
  //  always being taken as a reference
  gsi::method<C_P, const CopyDetector &, const CopyDetector &, gsi::arg_make_reference> ("pass_cd_cref_as_ref", &C_P::pass_cd_cref)
2019-01-31 01:07:15 +01:00
Matthias Koefferlein 7b07782cdf Avoid an issue with virtual functions
Reimplementing virtual functions with
"const &" arguments wasn't behaving as
expected because these arguments were
copied.

Now, "const &" for arguments (in virtual
function reimplementation) is not implemented
as a copy.

In addition, now it's possible to declare
results as references always (also if const &).

See gsiTest.cc:1078 for example:

  //  gsi::arg_make_reference makes the function's return value
  //  always being taken as a reference
  gsi::method<C_P, const CopyDetector &, const CopyDetector &, gsi::arg_make_reference> ("pass_cd_cref_as_ref", &C_P::pass_cd_cref)
2019-01-31 00:36:44 +01:00
Matthias Koefferlein 4068478887 Implemented SPICE writer + tests. 2019-01-31 00:07:10 +01:00
Matthias Koefferlein 4712ee0f29 Activated DeviceAbstract for GSI. 2019-01-25 22:40:41 +01:00
Matthias Koefferlein 29264013b0 WIP: more consistent handling of polygon splitting parameters. 2019-01-25 22:28:25 +01:00
Matthias Koefferlein 6da9bc5e85 Updated tests after switching to boolean core. 2019-01-25 21:38:45 +01:00
Matthias Koefferlein f83e1dae43 Refactoring, some bugfixes, GSI bindings for L2N methods. 2019-01-20 23:12:27 +01:00
Matthias Koefferlein 4c7f43d749 More l2n reader tests. 2019-01-20 17:31:58 +01:00
Matthias Koefferlein dd39168dc8 WIP: Enabled layout generation from read l2n data. 2019-01-20 02:50:23 +01:00
Matthias Koefferlein a5e2cf58c3 l2n dump format is leaner (device terminal shapes dropped from nets as they are contained in the device abstracts). Some refactoring. 2019-01-19 23:00:19 +01:00
Matthias Koefferlein 8213e71a79 WIP: l2n reader implementation, some bug fixes, refactoring. 2019-01-19 22:19:08 +01:00
Matthias Koefferlein 56bb39a273 LayoutToNetlist enhancements in the area of the dumper. 2019-01-16 22:45:58 +01:00
Matthias Koefferlein 5962d66940 WIP: major enhancements with respect to device handling
The device handling in the netlist extractor was now
entirely moved to device cells. New options are introduced
for exporting these cells. Tests have been updated.
2019-01-15 21:33:41 +01:00
Matthias Koefferlein 1af81b74d2 WIP: refactoring - turning devices into cells for better backannotation. 2019-01-14 00:59:47 +01:00
Matthias Koefferlein aeeb6d7c87 Fixed #200 by introducing layout locking during iteration
The cause for the problem was that the layout got updated
while iterating causing the mess within the iterator.

This solution is to lock the layout while an iterator
is present. This happens for various Cell and Shapes
iterator, so it's a major enhancement.
2019-01-09 01:06:11 +01:00
Matthias Koefferlein 9fa5618034 Added test for device combination. 2019-01-08 23:49:12 +01:00
Matthias Koefferlein d4d7ea8022 Updated copyright. 2019-01-08 01:09:25 +01:00
Matthias Koefferlein b0d7f5f7f5 Updated copyright. 2019-01-08 00:58:45 +01:00
Matthias Koefferlein feb2b69aa9 Merge remote-tracking branch 'origin/master' into dvb 2019-01-08 00:49:16 +01:00
Matthias Koefferlein fb4048d317 Added RBA tests for four-terminal MOS extraction plus global nets. 2019-01-08 00:17:58 +01:00
Matthias Koefferlein 294f1701b5 Added a test for joining of layers through multiple global net assignment. 2019-01-07 23:57:52 +01:00
Matthias Koefferlein 315bcdd016 WIP: bugfixed netlist extractor with global nets. 2019-01-07 23:33:57 +01:00
Matthias Koefferlein c80e335cd6 WIP: global nets integration in cluster builder. 2019-01-07 02:08:59 +01:00
Matthias Koefferlein a4f0fd665e Provided a solution for connectivity through global nets. 2019-01-06 17:50:51 +01:00
Matthias Koefferlein 64c2548ab8 WIP: first steps towards global nets. 2019-01-06 15:28:40 +01:00
Matthias Koefferlein eb435d5d85 WIP: refactoring - separated pins of net into outgoing and subcircuit. 2019-01-06 12:53:22 +01:00
Matthias Koefferlein 261b14a260 WIP: GSI binding of LayoutToNetlist::build_nets 2019-01-06 02:15:04 +01:00
Matthias Koefferlein 8d51d1e4bb WIP: better optimization of hierarchical net output. 2019-01-06 01:54:36 +01:00
Matthias Koefferlein ec3a3b0f8c WIP: added ability to export nets to layouts. 2019-01-06 01:32:20 +01:00
Matthias Koefferlein bc4f9efa5d One more test for probing with a slightly more complex hierarchy. 2019-01-05 23:21:37 +01:00
Matthias Koefferlein f86f8149eb Fixed a bug that caused a segfault in the Layout2Netlist object (array repo references to original layout rather than to the working layout) 2019-01-05 22:40:53 +01:00
Matthias Koefferlein 6e468b43e0 WIP: bugfix - local to instance interaction did shortcut too early. 2019-01-05 10:12:55 +01:00
Matthias Koefferlein c31c87916c WIP: bugfix - array reference were not always considered correctly. 2019-01-05 01:34:10 +01:00
Matthias Koefferlein ad6d9b5715 WIP: provide a less memory intensive way to deliver shapes from nets. 2019-01-04 17:41:09 +01:00
Matthias Koefferlein 3fd99407a3 WIP: bugfix - hierarchical net extractor wasn't considering self-interactions between instance array elements. 2019-01-03 23:25:28 +01:00
Matthias Koefferlein 62d9941c4a WIP: Bugfix - hierarchy was dropping instances. 2019-01-03 22:09:19 +01:00
Matthias Koefferlein e3b8d3635c Small bugfix: object._destroy wasn't working for directly passed objects. 2019-01-02 23:18:14 +01:00
Matthias Koefferlein 9c607d7663 Added a first version of the layout to netlist extraction feature
The main entry point is RBA::LayoutToNetlist which is the
GSI binding for the layout to netlist extractor. For a first
impression about the abilities of this extractor see the
Ruby tests in testdata/ruby/dbLayoutToNetlist.rb.

The framework itself consists of many classes, specifically

- RBA::Netlist for the netlist representation
- RBA::DeviceClass and superclasses (e.g. RBA::DeviceClassResistor and
  RBA::DeviceClassMOS3Transistor) for the description of devices.
- RBA::DeviceExtractor and superclasses (i.e. RBA::DeviceExtractorMOS3Transistor or
  the generic RBA::GenericDeviceExtractor) for the implementation of the
  device extraction.
- RBA::Connectivity for the description of inter- and intra-layer connections.
2018-12-30 22:43:56 +01:00
Matthias Koefferlein f989a85642 WIP: introduced Circuit::is_external_net 2018-12-30 18:44:30 +01:00
Matthias Koefferlein 72a140957d WIP: added test for recursive net shape retrieval 2018-12-30 18:22:45 +01:00
Matthias Koefferlein a787204e77 WIP: connect and disconnect terminal by name in GSI 2018-12-30 13:28:11 +01:00
Matthias Koefferlein 293c6f496e WIP: more query functions for netlist classes (i.e. net by name, device by name etc.), some refactoring, GSI bindings, tests. 2018-12-30 13:00:03 +01:00
Matthias Koefferlein c571535e55 WIP: standard device classes, added GSI binding plus tests. 2018-12-29 23:48:31 +01:00
Matthias Koefferlein 45b35f3aae WIP: to_string for netlist, tests, some bugfixes on device combination. 2018-12-29 22:18:58 +01:00
Matthias Koefferlein d57ede441c WIP: netlist topology - children, parents, top-down and bottom-up iteration. 2018-12-29 00:48:28 +01:00
Matthias Koefferlein 2f48479838 WIP: a bit of simplification, renaming of methods, parents for subcircuits, devices. References for circuits pointing to subcircuits. 2018-12-28 22:51:11 +01:00
Matthias Koefferlein 8b2902c31b WIP: introduced expanded net name 2018-12-27 10:43:25 +01:00
Matthias Koefferlein f0f620b1cd WIP: added subcircuit IDs for easier referencing. 2018-12-27 01:58:34 +01:00
Matthias Koefferlein 62ffcd38e6 WIP: refactoring of the netlist property thing. Now it's internal and there is only the device terminal property. The property also does not store device pointers but just IDs 2018-12-27 01:27:58 +01:00
Matthias Koefferlein 2171b98bd8 WIP: introduced device IDs 2018-12-27 00:59:44 +01:00
Matthias Koefferlein 8f568641e0 WIP: some refactoring, added label recognition to net extraction, test enhancements. 2018-12-27 00:20:21 +01:00
Matthias Koefferlein 024907e7ef WIP: first test for device extraction. 2018-12-26 10:02:34 +01:00
Matthias Koefferlein 4e899d7d6c WIP: Added a test layout 2018-12-26 00:36:54 +01:00
Matthias Koefferlein 195324295d WIP: tests for new net predicates. 2018-12-25 20:56:08 +01:00
Matthias Koefferlein 4f8416766c WIP: renamed port -> terminal for devices. This is correct technical term. A port is a two-terminal entity. 2018-12-25 20:19:37 +01:00
Matthias Koefferlein e3b795e334 Unique ID of device class objects, netlist reference in device class. 2018-12-24 13:52:17 +01:00
Matthias Koefferlein eb6b043c3b Parameter values of db::Device/db::DeviceClass 2018-12-24 13:39:19 +01:00
Matthias Koefferlein c5222c26e3 Added DevicePortProperty class with tests and GSI binding 2018-12-24 01:31:06 +01:00
Matthias Koefferlein aa5e885215 Added Ruby tests for GSI binding of db::Netlist classes 2018-12-24 00:08:34 +01:00
Matthias Koefferlein 3c2c72d9ed WIP: GSI binding of db::Netlist at al 2018-12-23 22:31:26 +01:00
Matthias Koefferlein 2c4e84fdf2 WIP: netlist property framework
- NetlistProperty is the base class for objects that can
  be attached to shapes for annotation
- First property type implemented: net name is a way
  to annotate net names
2018-12-18 23:56:01 +01:00
Matthias Koefferlein ef0e0d38c2 WIP: property collection in net clusters, more tests. 2018-12-09 23:24:32 +01:00
Matthias Koefferlein eb8abaf5a5 Some refactoring of net processor
- introduced concept of root cluster
- recursive shape iterator for clusters
2018-12-09 00:54:08 +01:00