1. Be more careful with net names
Net names are used now for sorting the graph nodes, but not for
strict compare. This is useful to derive swappable pins for
blackbox circuits.
2. Be more careful with pins from schematic netlist
Pins from schematic netlist without a corresponding pin on the layer
side are treated as mandatory unless connected to a trivial net.
Pins connecting to non-trivial nets inside the subcircuit are always
considered mandatory.
This way schematic pins enforce corresponding layout pins.
On the other hand, layout pins connecting to trivial nets inside
the subcircuit are considered non-mandatory.
1. removed some duplicate symbol linker error
2. removed many compiler warnings (mainly size_t/int compatibility)
3. consistent definition of db::pcell_id_type
4. removed UTF-8 character codes from string constants
5. float constants for float arguments
6. timeout in tlHttp when no openssl lib is found (instead of stalling
app)
While doing so changed the following things too:
- Instance and Shapes methods raise an exception if not
in editable mode and with undo/redo
- Faster and leaner undo/redo on Shapes#clear
Previously: matching of blackbox pins was enforced
by using pin names for passive nets in the compare.
Problem: no match was achieved when pins are not
named or not named consistently.
In this case, it's desirable to treat them as
ambiguous.
The new solution is to let the ambiguity resolver handle
that using an extended definition of the net names:
it will take the pin name into account if an unnamed net
is attached to a pin.
In addition, net ambiguities are projected to pin
equivalence now. This also will propagate symmetry
through nested blocks (dbNetlistCompareTests:20_BusLikeConnections).
* Device#net_for_terminal with terminal name
* Spice writer now dumps all parameters for resistors and caps (also secondary)
* Enabled Spice writer delegate in LVS (spice_format(...))
* Device class factories for built-in device extractors
- Spice reader will set primary flag for all (known) parameters
read from a Spice netlist
- "extract_devices" will return the device class object
- primary/secondary flag can be set on device class objects
through "enable_devices"
* same_nets! method for strong matching
* same_nets and same_nets! except glob pattern to circuits and nets
* both observe case sensitivity
* helper functions for case sensitivity Netlist#is_case_sensitive?, Netlist#case_sensitive=
* Netlist#nets_by_name to get nets from pattern
Abstract pins are created when pins are not attached to any or only to passive nets
(passive nets are those without device terminals or subcircuit pins).
1. Such pins were treated swappable. Now named pins will not be treated
swappable but are mapped by name. This enables blackbox models where
the pins are labelled and must correspond to schematic pins.
2. A bug was present which lead to incorrect handling of abstract
nets in net compare.
