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157 Commits

Author SHA1 Message Date
Matthias Koefferlein 6cf7558384 WIP: preparations for global net extraction 2019-01-06 17:04:13 +01:00
Matthias Koefferlein 64c2548ab8 WIP: first steps towards global nets. 2019-01-06 15:28:40 +01:00
Matthias Koefferlein eb435d5d85 WIP: refactoring - separated pins of net into outgoing and subcircuit. 2019-01-06 12:53:22 +01:00
Matthias Koefferlein ec3a3b0f8c WIP: added ability to export nets to layouts. 2019-01-06 01:32:20 +01:00
Matthias Koefferlein bc4f9efa5d One more test for probing with a slightly more complex hierarchy. 2019-01-05 23:21:37 +01:00
Matthias Koefferlein f86f8149eb Fixed a bug that caused a segfault in the Layout2Netlist object (array repo references to original layout rather than to the working layout) 2019-01-05 22:40:53 +01:00
Matthias Koefferlein 15b79c9ddb IMPORTANT BUGFIX: array repo handling 
The issue: when cloning an array, the
"in_repository" flag might be left set. This
makes the system think the array is kept in
a repo. In the best case this creates a
memory leak.
 2019-01-05 21:55:06 +01:00
Matthias Koefferlein 6e468b43e0 WIP: bugfix - local to instance interaction did shortcut too early. 2019-01-05 10:12:55 +01:00
Matthias Koefferlein c31c87916c WIP: bugfix - array reference were not always considered correctly. 2019-01-05 01:34:10 +01:00
Matthias Koefferlein ad6d9b5715 WIP: provide a less memory intensive way to deliver shapes from nets. 2019-01-04 17:41:09 +01:00
Matthias Koefferlein 3fd99407a3 WIP: bugfix - hierarchical net extractor wasn't considering self-interactions between instance array elements. 2019-01-03 23:25:28 +01:00
Matthias Koefferlein 62d9941c4a WIP: Bugfix - hierarchy was dropping instances. 2019-01-03 22:09:19 +01:00
Matthias Koefferlein 20799026d1 WIP: bugfix in net extraction (wrong hierarchy treatment) 2019-01-03 18:26:18 +01:00
Matthias Koefferlein 76330bea3a Save some memory on net shape retrieval. 2019-01-02 23:23:04 +01:00
Matthias Koefferlein 509de593e6 Removed a compiler warning. 2018-12-31 01:42:55 +01:00
Matthias Koefferlein 9c607d7663 Added a first version of the layout to netlist extraction feature 
The main entry point is RBA::LayoutToNetlist which is the
GSI binding for the layout to netlist extractor. For a first
impression about the abilities of this extractor see the
Ruby tests in testdata/ruby/dbLayoutToNetlist.rb.

The framework itself consists of many classes, specifically

- RBA::Netlist for the netlist representation
- RBA::DeviceClass and superclasses (e.g. RBA::DeviceClassResistor and
  RBA::DeviceClassMOS3Transistor) for the description of devices.
- RBA::DeviceExtractor and superclasses (i.e. RBA::DeviceExtractorMOS3Transistor or
  the generic RBA::GenericDeviceExtractor) for the implementation of the
  device extraction.
- RBA::Connectivity for the description of inter- and intra-layer connections.
 2018-12-30 22:43:56 +01:00
Matthias Koefferlein f989a85642 WIP: introduced Circuit::is_external_net 2018-12-30 18:44:30 +01:00
Matthias Koefferlein 72a140957d WIP: added test for recursive net shape retrieval 2018-12-30 18:22:45 +01:00
Matthias Koefferlein 16a2b1982d WIP: added one more level of abstraction to layout-to-netlist extraction (db::LayoutToNetlist) for easier use. 2018-12-30 17:53:46 +01:00
Matthias Koefferlein b512f628bc WIP: specific device extractor and GSI binding. 2018-12-30 14:54:59 +01:00
Matthias Koefferlein c841b84867 WIP: some minor refactoring. 2018-12-30 13:37:52 +01:00
Matthias Koefferlein 293c6f496e WIP: more query functions for netlist classes (i.e. net by name, device by name etc.), some refactoring, GSI bindings, tests. 2018-12-30 13:00:03 +01:00
Matthias Koefferlein 425acda31a WIP: GSI binding of device extractor classes. 2018-12-30 11:32:33 +01:00
Matthias Koefferlein 44b5b2742e WIP: tests for specialized device classes and device combination 2018-12-29 22:58:29 +01:00
Matthias Koefferlein 45b35f3aae WIP: to_string for netlist, tests, some bugfixes on device combination. 2018-12-29 22:18:58 +01:00
Matthias Koefferlein edbafae43e WIP: make top level pins for named nets and netlist purging. Tests. 2018-12-29 20:50:35 +01:00
Matthias Koefferlein 54adb84e27 WIP: locking of netlist for better performance. 2018-12-29 01:04:48 +01:00
Matthias Koefferlein d57ede441c WIP: netlist topology - children, parents, top-down and bottom-up iteration. 2018-12-29 00:48:28 +01:00
Matthias Koefferlein 2f48479838 WIP: a bit of simplification, renaming of methods, parents for subcircuits, devices. References for circuits pointing to subcircuits. 2018-12-28 22:51:11 +01:00
Matthias Koefferlein a5b9cbfe5b WIP: device extractor now declares it's layers, passing layers by name supported now. 2018-12-28 01:53:27 +01:00
Matthias Koefferlein c665d6aceb WIP: introduced error messaging for device extractor. 2018-12-28 01:06:17 +01:00
Matthias Koefferlein 411c18cdb4 WIP: also test parameter extraction in device extraction test. 2018-12-27 21:06:35 +01:00
Matthias Koefferlein 1c41c43b95 WIP: rename netlist extractor test. 2018-12-27 10:58:48 +01:00
Matthias Koefferlein d6473b4d84 WIP: moved netlist extractor into right place. 2018-12-27 10:57:46 +01:00
Matthias Koefferlein 8b2902c31b WIP: introduced expanded net name 2018-12-27 10:43:25 +01:00
Matthias Koefferlein 639b0026d3 WIP: some refactoring for better consistency and easier usage of the device extractor. 2018-12-27 10:33:08 +01:00
Matthias Koefferlein bfae347ffb WIP: renaming sub_circuit->subcircuit for consistency 2018-12-27 02:02:17 +01:00
Matthias Koefferlein f0f620b1cd WIP: added subcircuit IDs for easier referencing. 2018-12-27 01:58:34 +01:00
Matthias Koefferlein 795a77f7ce WIP: take care of the property name used for device terminal annotation. 2018-12-27 01:39:28 +01:00
Matthias Koefferlein 62ffcd38e6 WIP: refactoring of the netlist property thing. Now it's internal and there is only the device terminal property. The property also does not store device pointers but just IDs 2018-12-27 01:27:58 +01:00
Matthias Koefferlein f5071d3254 WIP: some more refactoring. 2018-12-27 01:03:52 +01:00
Matthias Koefferlein 2171b98bd8 WIP: introduced device IDs 2018-12-27 00:59:44 +01:00
Matthias Koefferlein 724d1bc255 WIP: some small refactoring. 2018-12-27 00:32:40 +01:00
Matthias Koefferlein 8f568641e0 WIP: some refactoring, added label recognition to net extraction, test enhancements. 2018-12-27 00:20:21 +01:00
Matthias Koefferlein 024907e7ef WIP: first test for device extraction. 2018-12-26 10:02:34 +01:00
Matthias Koefferlein 1db5ad016c WIP: added first tests for device extraction. 2018-12-26 00:39:46 +01:00
Matthias Koefferlein bfc0e24d50 WIP: fixed some compiler warnings. 2018-12-26 00:36:34 +01:00
Matthias Koefferlein 88c60420d0 WIP: fixed verbosity of some output. 2018-12-26 00:34:34 +01:00
Matthias Koefferlein 195324295d WIP: tests for new net predicates. 2018-12-25 20:56:08 +01:00
Matthias Koefferlein 4f8416766c WIP: renamed port -> terminal for devices. This is correct technical term. A port is a two-terminal entity. 2018-12-25 20:19:37 +01:00