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113 Commits

Author SHA1 Message Date
Matthias Koefferlein 7d6237a90a Unescaping of net names on Spice reader -> writer/reader should be self-compatible. 2019-05-31 22:55:09 +02:00
Matthias Koefferlein 985cffc099 Unique net names for Spice netlist writer 2019-05-31 22:19:51 +02:00
Matthias Koefferlein c684633dd6 Some enhancements for netlist extraction and writer 
* Spice writer can now be configure to skip the debug
  comments
* < and > are allowed chars in spice names now
* global net names have second prio over labels now
 2019-05-31 00:11:28 +02:00
Matthias Koefferlein 1764ce04af Special golden data for MSVC/dev ex test 2019-05-29 23:37:50 +02:00
Matthias Koefferlein 9bf1263efa Special golden data for MSVC/LVS test 2019-05-29 23:34:55 +02:00
Matthias Koefferlein 1935ee7ff9 Tried to fix unit tests for MSVC 2019-05-29 22:09:39 +02:00
Matthias Koefferlein dea2b76dc8 Added unit tests for res and cap device extractors. 2019-05-29 21:35:02 +02:00
Matthias Koefferlein 10667d8e35 Bugfixed last commit, fixed unit tests. 2019-05-29 00:51:42 +02:00
Matthias Koefferlein f8646412ca Added missing files 2019-05-25 01:19:32 +02:00
Matthias Koefferlein 252622e3f8 Fixed unit tests, support floating pins for netlist compare 2019-05-20 23:48:07 +02:00
Matthias Koefferlein 625b173379 Reworked l2n and lvsdb format such that reading/writing gets more reproducible: maintain unnamed state of devices, subcircuits and pins 2019-05-20 22:33:23 +02:00
Matthias Koefferlein 834dcc7474 WIP: LVSDB reader/writer fixes 2019-05-19 23:42:31 +02:00
Matthias Koefferlein ea8320dcf8 WIP: LVSDB reader/writer: bugfixes, refactoring, tests. 2019-05-19 22:55:03 +02:00
Matthias Koefferlein ea28530c55 L2N: combined device persistance (complex concept - needs simplification?) 2019-05-10 00:15:51 +02:00
Matthias Koefferlein c33fd40ec9 Switched l2n format to relative mode by default (relative mode is an option and maybe shorter) 2019-05-04 23:06:18 +02:00
Matthias Koefferlein 548f16f1df WIP: tried to provide a more consistent net building feature (here: building hierarchical nets with properties as net annotation - needs cell variants if properties are assigned to subcells too) 2019-05-04 00:37:38 +02:00
Matthias Koefferlein 2aaec56adb WIP: netlist browser - extended the net export scheme of build_net to support net annotation and flattening. 2019-05-03 23:33:37 +02:00
Matthias Koefferlein e661bac0a7 Netlist browser: fixed a segfault on 'unload all' 2019-04-28 22:57:06 +02:00
Matthias Koefferlein 7f9da5e8de Introduced concept of device class templates 
This concept allows to persist at least the standard
(built-in) device classes into L2N DB files. This way
device classes are persisted.
 2019-04-23 19:44:07 +02:00
Matthias Koefferlein f6836b96a2 WIP: some enhancements 
Spice writer: don't prefix model name with "M"
Added "device_class_mismatch" message to netlist compare
Assertion if device classes or circuits are nil on
"same_..."
 2019-04-07 10:15:57 +02:00
Matthias Koefferlein 52fb8b0f65 Merge remote-tracking branch 'remotes/origin/master' into dvb 2019-04-04 07:35:43 +02:00
Matthias Koefferlein 89ffd7e3da WIP: Simple SPICE reader. 2019-04-01 22:46:33 +02:00
Matthias Koefferlein 9613ad72c8 WIP: netlist compare - using it for more tests 
Issue solved: some circuit pins may not have a net - these
need to be ignored.

Requirement: all pins with a net must be mapped.

Detached pins are not present in the mapping table.
A dummy mapping table was introduced to allow dropping
of pins in the second circuit too.

Output of compare should not depend on memory location
anymore and pin mismatch reporting should include all
pins.
 2019-03-31 23:59:43 +02:00
Matthias Koefferlein e545d6af3f Refined solution for issue-245 by providing a better name mapping (checked with ngspice) 2019-03-22 00:05:17 +01:00
Matthias Koefferlein 9356f32026 Fixed issue-245 (support Spice netlist with names instead of numbers) 
The option is in the Spice writer (writer.use_net_names=true).
 2019-03-21 23:34:16 +01:00
Matthias Koefferlein ab8107de2d Bugfix: Spice writer needs 'P' suffix for source/drain area of MOS 2019-03-10 01:26:52 +01:00
Matthias Koefferlein 8b29b30ff9 WIP: more consistent text handling 
Texts are not only kept inside original layers, but
also inside deep layers. This enables using texts
from DRC.

However, texts in deep layers are kept as markers.
Mostly they are converted back to texts, but the
orientation will be lost.

The change eliminates the need to using Iterators
in DRC instead of original layers and use of
label layers in deep mode.

A drawback is the presence of marker shapes in
deep mode (unless polygon layers are created).
Also, text output to RDB is not supported from
deep layers currently.
 2019-03-06 00:34:56 +01:00
Matthias Koefferlein bacd565d05 Bugfix: Spice writer added one pin too much to MOS4 transistors. 2019-03-04 17:26:35 +01:00
Matthias Koefferlein 8d3b94201e Antenna check: tests added, 'catchall' diode protection 2019-03-01 23:07:28 +01:00
Matthias Koefferlein 9f4f2d58d7 First version of antenna check. 2019-02-28 23:56:49 +01:00
Matthias Koefferlein d4ed21f42a Just new tests 2019-02-25 22:34:06 +01:00
Matthias Koefferlein 3c6aafcc0c Region: hierarchical text object detection implementated. 2019-02-23 00:56:55 +01:00
Matthias Koefferlein 18f74bac1e Enabled transformations for deep regions/edges/edge pairs - important for handling layouts with different DBUs in DRC 2019-02-22 01:02:48 +01:00
Matthias Koefferlein 91407ddaa9 Added tests for region processors. 2019-02-20 21:40:43 +01:00
Matthias Koefferlein 496b695ef0 Refactoring of the polygon processing in Region 2019-02-19 22:11:55 +01:00
Matthias Koefferlein 9ec6b44c93 Added some tests for the previous commit. 2019-02-18 00:15:26 +01:00
Matthias Koefferlein 311318c578 Ported edge/edge DRC functions to hierarchical mode. 2019-02-17 18:54:33 +01:00
Matthias Koefferlein c40f147dc7 Edge/edge and edge/polygon interaction test ported to hierarchical mode. 2019-02-17 18:36:15 +01:00
Matthias Koefferlein 7ef0451ca8 Partial segments of edges converted to hierarchical operations. 2019-02-17 17:53:21 +01:00
Matthias Koefferlein 74006b6208 Hierarchical implementation of extended method for edges 2019-02-17 17:34:31 +01:00
Matthias Koefferlein ae783a2245 Hiearchical implementation of edge filter. 2019-02-17 16:18:24 +01:00
Matthias Koefferlein 61d766bd4c Hierarchical implementation of edge to region operations. 2019-02-17 16:05:39 +01:00
Matthias Koefferlein e6ee1c064e Hierarchical implementation of edge/edge booleans. 2019-02-17 15:07:16 +01:00
Matthias Koefferlein 8e5bffcf18 Hierarchical angle check. 2019-02-17 11:42:30 +01:00
Matthias Koefferlein a7bfaac424 Cell variant resolution by propagation, grid check now implementation hierarchically (with propagation) 2019-02-17 10:59:04 +01:00
Matthias Koefferlein 6e35e80963 Hierarchical implementation of polygon vs. edge interact 2019-02-15 23:43:45 +01:00
Matthias Koefferlein 78617930dd Hierarchical implementation of self-overlap merge. 2019-02-13 22:41:12 +01:00
Matthias Koefferlein ddcfda8761 Some optimization: keep merged state in deep region. 2019-02-13 17:17:03 +01:00
Matthias Koefferlein 68947bedd2 Updated golden test data. 2019-02-13 01:11:15 +01:00
Matthias Koefferlein b0fc2be96e Deep regions: some more operations implemented hierarchically 
- snap (!) - but only for gx == gy
- filtering
- interact/inside/outside/overlap + not_... variants
- edges
 2019-02-13 01:07:32 +01:00