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3922 Commits

Author SHA1 Message Date
Matthias Koefferlein 084e1a746e Fixed #875 (drawing glitch) 2021-07-20 21:42:24 +02:00
Matthias Köfferlein d5250cfc00
Merge pull request #870 from KLayout/wip 
Wip
 2021-07-19 19:50:46 +02:00
Matthias Köfferlein 37f7645d77
Merge pull request #869 from Kazzz-S/mac-EOL 
EOL style for Mac
 2021-07-19 08:34:50 +02:00
Matthias Koefferlein 23d0fcae8d Added new tests 2021-07-19 08:32:55 +02:00
Matthias Koefferlein 2e21498422 Updated unit tests 2021-07-19 07:58:42 +02:00
Matthias Koefferlein 722b45b721 Fixed tests 2021-07-19 07:47:41 +02:00
Matthias Koefferlein bc74f189f8 Introducing asymmetric ambiguity groups for better matching of black box circuits with optional pins. 2021-07-18 23:33:01 +02:00
Matthias Koefferlein 70f4c7e2b5 A small refactoring. 2021-07-18 23:09:51 +02:00
Matthias Koefferlein 2c8d065eb3 Some enhancments + test update 
1. Be more careful with net names
Net names are used now for sorting the graph nodes, but not for
strict compare. This is useful to derive swappable pins for
blackbox circuits.

2. Be more careful with pins from schematic netlist
Pins from schematic netlist without a corresponding pin on the layer
side are treated as mandatory unless connected to a trivial net.
Pins connecting to non-trivial nets inside the subcircuit are always
considered mandatory.
This way schematic pins enforce corresponding layout pins.
On the other hand, layout pins connecting to trivial nets inside
the subcircuit are considered non-mandatory.
 2021-07-18 22:34:02 +02:00
Matthias Koefferlein 51d117e379 Refined black box pin heuristics 
Pins are required to match if they are passive inside the
subcircuit but connected to a non-trivial net in the calling circuit.
 2021-07-18 20:39:19 +02:00
Matthias Koefferlein 05386668b4 Re-introducing pin name mapping for net assignment 2021-07-18 20:20:23 +02:00
Matthias Koefferlein 23bea5dc07 Using real pin IDs for printing nodes in netlist compare debug output 2021-07-18 17:39:32 +02:00
Matthias Koefferlein d018805c23 Some refactoring. 2021-07-18 16:54:27 +02:00
Matthias Koefferlein 2f3e113db0 Added missing subcircuit mismatch events to netlist compare 2021-07-17 22:06:06 +02:00
Matthias Koefferlein 3f3f4c9173 Fixed some compiler warnings. 2021-07-17 22:03:22 +02:00
Kazunari Sekigawa 04e345ef14 Set the EOL style back to Unix. 2021-07-17 22:39:46 +09:00
Matthias Köfferlein 054bfa3be4
Merge pull request #865 from KLayout/issue-864 
Fixed #864 (Shapes#copy_shapes does not support undo/redo)
 2021-07-17 13:44:15 +02:00
Matthias Köfferlein 19f2769137
Merge pull request #862 from KLayout/matching-of-blackbox-circuits 
Enhanced matching of blackbox/pin ambiguities
 2021-07-17 13:43:59 +02:00
Matthias Koefferlein 855f51fb7a Fixed build script 2021-07-17 12:11:37 +02:00
klayoutmatthias 1555daf68c Adjustments for Windows build with MSVC2019 (VC 16.10.31419.357) 
1. removed some duplicate symbol linker error
2. removed many compiler warnings (mainly size_t/int compatibility)
3. consistent definition of db::pcell_id_type
4. removed UTF-8 character codes from string constants
5. float constants for float arguments
6. timeout in tlHttp when no openssl lib is found (instead of stalling
   app)
 2021-07-17 00:20:55 +02:00
Matthias Koefferlein 2fee924103 Updated the solution 2021-07-15 23:39:02 +02:00
Matthias Koefferlein d14892382c Fixed #864 (Shapes#copy_shapes does not support undo/redo) 
While doing so changed the following things too:
- Instance and Shapes methods raise an exception if not
  in editable mode and with undo/redo
- Faster and leaner undo/redo on Shapes#clear
 2021-07-15 00:44:28 +02:00
klayoutmatthias 7031c6faf4 Updated build.bat to recognize Visual Studio 2019 installations. Still not supporting MSVC 2019 2021-07-10 17:59:05 +02:00
Matthias Koefferlein 2b447854f9 Enhanced matching of blackbox/pin ambiguities 
Previously: matching of blackbox pins was enforced
by using pin names for passive nets in the compare.
Problem: no match was achieved when pins are not
named or not named consistently.

In this case, it's desirable to treat them as
ambiguous.

The new solution is to let the ambiguity resolver handle
that using an extended definition of the net names:
it will take the pin name into account if an unnamed net
is attached to a pin.

In addition, net ambiguities are projected to pin
equivalence now. This also will propagate symmetry
through nested blocks (dbNetlistCompareTests:20_BusLikeConnections).
 2021-07-08 23:54:20 +02:00
Matthias Koefferlein bad3232415 Trying to fix a linker problem. 2021-07-07 08:03:07 +02:00
Matthias Koefferlein 47db99c0dd Fixed a merge issue. 2021-07-07 07:44:50 +02:00
Matthias Koefferlein e4f5a41829 Removed a compiler option which is not needed. 2021-07-06 23:57:29 +02:00
Matthias Koefferlein d5b92c2925 More robustness for Windows build script 2021-07-06 23:46:04 +02:00
Matthias Koefferlein 9b18571d86 Merge branch 'master' into issue-859 2021-07-06 23:45:08 +02:00
Matthias Koefferlein 4e54715d64 Merge branch 'wip-lvs' 2021-07-06 23:40:44 +02:00
Matthias Köfferlein 6f6cab3fda
Merge pull request #852 from KLayout/issue-851 
Issue 851
 2021-07-06 23:38:54 +02:00
Matthias Köfferlein d10a28e96a
Merge pull request #850 from KLayout/ruby-3-enabling 
Ruby 3 enabling
 2021-07-06 23:38:40 +02:00
Matthias Köfferlein e78d0d81ae
Merge pull request #849 from KLayout/lvs-blackbox 
Lvs blackbox
 2021-07-06 23:38:21 +02:00
Matthias Köfferlein fb9c0077eb
Merge pull request #847 from KLayout/more-edge-pair-filters 
More edge pair filters
 2021-07-06 23:38:02 +02:00
Matthias Koefferlein 1035923d0f Fixed #859 (technology not assigned on new layout) 2021-07-06 22:20:21 +02:00
Matthias Koefferlein 720057e071 Added a #include which was missing 2021-07-06 21:16:57 +02:00
Matthias Koefferlein 8f65ab099f Fixed DeviceClass assignment operator 2021-07-06 07:56:27 +02:00
Matthias Koefferlein 4e0d8d92ef Updated doc, reverted netlist writer to write all parameters - it will only write primary parameters for R, L and C 2021-07-05 22:45:40 +02:00
Matthias Koefferlein 24c34f1d60 Updated test data 2021-07-05 22:29:33 +02:00
Matthias Koefferlein e34fc8967a Some enhancements 
* Device#net_for_terminal with terminal name
* Spice writer now dumps all parameters for resistors and caps (also secondary)
* Enabled Spice writer delegate in LVS (spice_format(...))
* Device class factories for built-in device extractors
 2021-07-05 22:22:13 +02:00
Matthias Koefferlein ba35ac9bfe Doc update, some tests 2021-07-05 21:06:02 +02:00
Matthias Koefferlein c62592ede1 Added test for device class factory. 2021-07-05 19:55:55 +02:00
Matthias Koefferlein b2746958d2 Updated tests 2021-07-04 23:31:37 +02:00
Matthias Koefferlein 20b7ee6aca Fixed some documentation bugs 2021-07-04 20:11:53 +02:00
Matthias Koefferlein 4303e1ab73 Revert change of making spice parameters primary - will create problems in swappable parameters such as AD and AS 2021-07-04 19:58:15 +02:00
Matthias Koefferlein 9f3d26af25 Doc update 2021-07-04 19:23:30 +02:00
Matthias Koefferlein ae6f77f45f Serialization of custom device classes 2021-07-04 19:14:37 +02:00
Matthias Koefferlein 3220bdf60d Added device class templates for CapWithBulk and ResWithBulk 2021-07-04 19:14:11 +02:00
Matthias Koefferlein 45152dad00 Fixed a linker issue 2021-07-04 19:13:42 +02:00
Matthias Koefferlein ce61145f1c More control over primary/secondary flag of parameters in device extraction 
- Spice reader will set primary flag for all (known) parameters
  read from a Spice netlist
- "extract_devices" will return the device class object
- primary/secondary flag can be set on device class objects
  through "enable_devices"
 2021-07-04 17:05:17 +02:00