iverilog/vhdlpp
Larry Doolittle befff82655 Spelling fixes
Comments and debug messages.
2012-07-27 18:25:32 -07:00
..
Makefile.in Reword concat to handle aggregate arguments. 2012-05-22 17:31:26 -07:00
README.txt Spelling fixes to vhdlpp tree 2012-05-17 16:42:03 -07:00
architec.cc Initial support for if_generate syntax. 2012-05-22 17:31:25 -07:00
architec.h Initial support for if_generate syntax. 2012-05-22 17:31:25 -07:00
architec_debug.cc Add support for VHDL for-generate 2011-10-30 17:10:19 -07:00
architec_elaborate.cc Handle VHDL records. 2012-05-22 17:31:26 -07:00
architec_emit.cc Sort the typedef emits so that types are emitted in the order used. 2012-05-22 17:31:27 -07:00
compiler.cc
compiler.h
debug.cc Reword concat to handle aggregate arguments. 2012-05-22 17:31:26 -07:00
entity.cc Put off array bound evaluation / describe entity generics as parameters 2011-10-15 17:41:48 -07:00
entity.h Spelling fixes to vhdlpp tree 2012-05-17 16:42:03 -07:00
entity_elaborate.cc Elaborate expressions for entity generics. 2011-10-29 17:07:03 -07:00
entity_emit.cc Fix emit of struct ports/declarations. 2012-05-22 17:31:26 -07:00
entity_stream.cc
expression.cc Reword concat to handle aggregate arguments. 2012-05-22 17:31:26 -07:00
expression.h Spelling fixes 2012-07-27 18:25:32 -07:00
expression_debug.cc Reword concat to handle aggregate arguments. 2012-05-22 17:31:26 -07:00
expression_elaborate.cc VHDL named types work in more places. 2012-05-22 17:31:27 -07:00
expression_emit.cc Sort the typedef emits so that types are emitted in the order used. 2012-05-22 17:31:27 -07:00
expression_evaluate.cc Reword concat to handle aggregate arguments. 2012-05-22 17:31:26 -07:00
expression_stream.cc Reword concat to handle aggregate arguments. 2012-05-22 17:31:26 -07:00
ivl_assert.h
lexor.lex Spelling fixes to vhdlpp tree 2012-05-17 16:42:03 -07:00
lexor_keyword.gperf
library.cc Support types in packages. 2012-05-22 17:31:25 -07:00
main.cc Use mkdir() instead of _mkdir() for MinGW 2011-12-18 11:43:35 -08:00
package.cc Handle incomplete type declarations 2012-05-22 17:31:27 -07:00
package.h
parse.y Spelling fixes 2012-07-27 18:25:32 -07:00
parse_api.h Spelling fixes to vhdlpp tree 2012-05-17 16:42:03 -07:00
parse_misc.cc Put off array bound evaluation / describe entity generics as parameters 2011-10-15 17:41:48 -07:00
parse_misc.h Support types in packages. 2012-05-22 17:31:25 -07:00
parse_types.h Support VHDL user defined array types. 2011-11-05 15:55:17 -07:00
parse_wrap.h
scope.cc Support types in packages. 2012-05-22 17:31:25 -07:00
scope.h Handle incomplete type declarations 2012-05-22 17:31:27 -07:00
sequential.cc Support VHDL user defined array types. 2011-11-05 15:55:17 -07:00
sequential.h Support VHDL user defined array types. 2011-11-05 15:55:17 -07:00
sequential_debug.cc
sequential_elaborate.cc
sequential_emit.cc Put off array bound evaluation / describe entity generics as parameters 2011-10-15 17:41:48 -07:00
vhdlint.cc
vhdlint.h
vhdlnum.h
vhdlpp_config.h.in
vhdlreal.cc
vhdlreal.h
vsignal.cc VHDL initialization expressions for signals. 2011-10-29 17:06:40 -07:00
vsignal.h VHDL initialization expressions for signals. 2011-10-29 17:06:40 -07:00
vtype.cc Handle incomplete type declarations 2012-05-22 17:31:27 -07:00
vtype.h Sort the typedef emits so that types are emitted in the order used. 2012-05-22 17:31:27 -07:00
vtype_emit.cc Sort the typedef emits so that types are emitted in the order used. 2012-05-22 17:31:27 -07:00
vtype_stream.cc Handle incomplete type declarations 2012-05-22 17:31:27 -07:00

README.txt

vhdlpp COMMAND LINE FLAGS:

-D <token>
  Debug flags. The token can be:

  * yydebug | no-yydebug

  * entities=<path>

-L <path>
  Library path. Add the directory name to the front of the library
  search path. The library search path is initially empty.

-V
  Display version on stdout

-v
  Verbose: Display version on stderr, and enable verbose messages to
  stderr.

-w <path>
  Work path. This is the directory where the working directory is.


LIBRARY FORMAT:

The vhdlpp program stores libraries as directory that contain
packages. The name of the directory (in lower case) is the name of the
library as used on the "import" statement. Within that library, there
are packages in files named <foo>.pkg. For example:

    <directory>/...
       sample/...
         test1.pkg
	 test2.pkg
       bar/...
         test3.pkg

Use the "+vhdl-libdir+<directory>" record in a config file to tell
Icarus Verilog that <directory> is a place to look for libraries. Then
in your VHDL code, access packages like this:

    library sample;
    library bar;
    use sample.test1.all;
    use bar.test3.all;

The *.pkg files are just VHDL code containing only the package with
the same name. When Icarus Verilog encounters the "use <lib>.<name>.*;"
statement, it looks for the <name>.pkg file in the <lib> library and
parses that file to get the package header declared therein.