e28636776a
Change case compare from logic to an LPM node.
2005-01-22 01:06:55 +00:00
9e94afe399
Use PartSelect/PV and VP to handle part selects through ports.
2005-01-09 20:16:00 +00:00
8f2d679c8a
Unify elaboration of l-values for all proceedural assignments,
...
including assing, cassign and force.
Generate NetConcat devices for gate outputs that feed into a
vector results. Use this to hande gate arrays. Also let gate
arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
5eb25e44e1
Add ivl_event_scope, and better document ivl_event_X methods.
2004-12-18 18:56:18 +00:00
4444079409
Fixup force statement elaboration.
2004-12-15 17:10:40 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
3dbc07f34d
Implement signed divide and signed right shift in nets.
2004-06-30 02:16:26 +00:00
e56b77a43f
Add support for wait on list of named events.
2003-12-03 02:46:23 +00:00
43f28b53a3
Design::get_flag returns const char* instead of string.
2003-11-10 20:59:03 +00:00
7521aa83f8
Pass FF synchronous set values to code generator.
2003-09-03 23:33:29 +00:00
64d795c53a
Preserve variable ranges all the way to the vpi.
2003-08-22 23:14:26 +00:00
e561819179
Add synthesis support for synchronous reset.
2003-08-15 02:23:52 +00:00
21ff80075a
Various warnings fixed.
2003-06-24 01:38:02 +00:00
bad861dba3
Module attributes make it al the way to ivl_target.
2003-06-23 01:25:44 +00:00
2a29c4fd62
Support real expressions in case statements.
2003-05-14 05:26:41 +00:00
f1cc9d865b
Support event names as expressions elements.
2003-04-22 04:48:29 +00:00
5d1d99a89f
Handle signed magnitude compare all the
...
way through to the vvp code generator.
2003-04-11 05:18:08 +00:00
1222153cdf
Keep parameter constants for the ivl_target API.
2003-03-10 23:40:53 +00:00
9c973efa9d
Wrong sense of need compared to have.
2003-03-06 04:32:40 +00:00
22d392a75c
Obsolete the ivl_event_name function.
2003-03-06 01:24:37 +00:00
badad63ab4
All NetObj objects have lex_string base names.
2003-03-06 00:28:41 +00:00
486274cfa1
Scope names stored only as basename.
2003-03-03 02:22:41 +00:00
a275133ff9
LPM objects store only their base names.
2003-02-26 01:29:24 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
c2070777b2
The $time system task returns the integer time
...
scaled to the local units. Change the internal
implementation of vpiSystemTime the $time functions
to properly account for this. Also add $simtime
to get the simulation time.
2002-12-21 00:55:57 +00:00
9ce2806710
Fix synth2 handling of aset/aclr signals where
...
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
166621bcb3
Generate vvp code for asynch set/reset of NetFF.
2002-09-26 03:18:04 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
14942b4b43
Dead code.
2002-08-07 02:17:14 +00:00
693e9e5ad0
Store only the base name of memories.
2002-08-05 04:18:45 +00:00
301040a67a
Avoid emitting to vvp local net symbols.
2002-07-05 21:26:17 +00:00
5eca5d9948
Carry integerness throughout the compilation.
2002-06-21 04:59:35 +00:00
422754f36f
Support carrying the scope of named begin-end
...
blocks down to the code generator, and have
the vvp code generator use that to support disable.
2002-05-27 00:08:45 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
700887d657
Verilog 2001 attriubtes on nets/wires.
2002-05-24 04:36:23 +00:00
e6c0629626
Add language support for Verilog-2001 attribute
...
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
828ca0ef9d
Add API to support user defined function.
2002-03-17 19:30:20 +00:00
b7c2bd4f72
Add the NetUserFunc netlist node.
2002-03-09 02:10:22 +00:00
364ffc9024
Add support for bit select of parameters.
...
This leads to a NetESelect node and the
vvp code generator to support that.
2002-01-28 00:52:41 +00:00
dd79885f6d
Add structural modulus support down to vvp.
2002-01-03 04:19:01 +00:00
c8319bcc02
Add ivl_logic_delay function to ivl_target.
2001-12-06 03:11:00 +00:00
08f0f5a1f7
DLL target support for force and release.
2001-11-14 03:28:49 +00:00
ab9a853d52
ivl_target support for cassign.
2001-11-01 04:25:31 +00:00
75e78e86d3
ivl_target support for assign/deassign.
2001-10-31 05:24:52 +00:00
d350620315
Support multiple root modules (Philip Blundell)
2001-10-19 21:53:24 +00:00
177fa4062b
Support IVL_LPM_DIVIDE for structural divide.
2001-10-16 02:19:26 +00:00
e99059e001
Support attributes to logic gates.
2001-09-16 22:19:42 +00:00
d762a320dc
Make constants available through the design root
2001-09-01 01:57:31 +00:00
e79a371f76
Support DFF CE inputs.
2001-08-31 22:58:39 +00:00
steve