Fix data type handling of module ports. When ports are declared
as ports and given data types in different statements, the parser
incorrectly (and silently) dropped the intended data type for the
default LOGIC type.
Rework the handling of file names to use a perm_string heap to hold
the file names, instead of the custom file name heap in the lexor.
Also rename the get_line to get_fileline to reflect its real duties.
This latter chage touched a lot of files.
This patch causes unnamed generate blocks to be automatically named
using the naming scheme defined in the Verilog-2005 standard. This
is a fix for the problem discussed in pr1821610.
I decided not to delete these since we may at some point in time want
this functionality back. For now they are commented out with an
explanation so we know what is going on.
This patch is rather large and fixes a couple of problems. The major
change is that instead of keeping all the range specifications in
a list that is later processed the information is now kept as
individual entries for the port and net definitions. This allows
easier checking for multiple definitions (pr1660028), more
detailed error messages and the ability to pass the now deprecated
style of a scalar I/O definition used with a vectored net definition.
These changes did require extra code to prevent a single definition
from setting the range values in more than on place.
When using the new ANSI-C style of port declarations (1364-2001 12.3.4
list_of_port_declarations) the compiler ensures that you do not
redeclare the port in the body (it is already completely defined).
This caught a few errors in the test suite (pr859 and sqrt32*).
The flag to disable the normal port checking and allow the deprecated
port syntax is -gno-io-range-error. This will print a warning for the
case of a scalar port with a vectored definition in the body. All
other cases are still considered an error.
This patch adds better checking for a missing endmodule or an attempt
to nest modules. A more descriptive message is printed and the location
of the original module definition is printed.
This patch fixes an incorrect optimization that was skipping a
call to set the port width when there was no width (a scalar).
The problem with this is that since a (0,0) pair was not added
to the list, later when the width was define to (1,0) the checking
code did not have the (0,0) to tell that there was a mismatch in
the port size. Section 12.3.3 States that the two sizes shall be
identical, so yes this is an error even though it is very minor.
Support initialization assignments of real value variables. In the
process, clean up the processing of real variable declarations in
the parser.
Signed-off-by: Stephen Williams <steve@icarus.com>
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
Larry Doolittle
Stephen Williams
Martin Whitaker
Martin Whitaker
Cary R
steve