Rather then just relying on comparing type names all throughout
elaboration, create type description data structures and use them
during elaboration to handle proper types.
Separate elaboration from code generation in the Entity, and add
to Architectures a code generator to handle some simple cases. At
this point we have the basic structure for the VHDL compiler.
Add enough rules to parse a simple VHDL program:
Parse library and use clauses,
Parse entity declarations, and
Parse architecture bodies.
Add some parser infrastructure:
Handle syntax errors with useful error messages,
Include file name and line numbers in parse errors,
Add some parser debug aids.
Stephen Williams