Commit Graph

307 Commits

Author SHA1 Message Date
Cary R 8d2913ac97 Remove unsigned/signed compile warning. 2009-09-24 12:05:28 -07:00
Stephen Williams 0018cb38b0 Merge branch 'master' into vvp-net-out-rework
Conflicts:
	vvp/schedule.cc
	vvp/schedule.h
2009-09-05 10:19:20 -07:00
Cary R 9a4cd1af32 Add support for non-blocking assignment to real arrays.
This patch adds support for the various types of non-blocking
assignments to real arrays.
2009-09-03 17:07:17 -07:00
Stephen Williams a2bf4904c4 Handle nets driven by C8<> constants. 2009-08-29 08:53:44 -07:00
Stephen Williams 9f11a23611 More robust creation of nets.
Handle the case where the input to a net is a constant. Since nets
do not exist anymore as nodes in their own right, we need to create
a driver to drive a net from a constant.

Handle forward references of net inputs.
2009-08-23 21:37:16 -07:00
Stephen Williams 6d34b41dce Hide the "out" member of the vvp_net_t object.
The out pointer of a vvp_net_t object is going to be a bit more
sophisticated when we redo the handling of net signals. Take a step
towards this rework by making the pointer private and implementing
methods needed to access it.
2009-04-03 20:40:26 -07:00
Cary R 5ae86bd6b4 Add support for 64 bit delays in procedural non-blocking assignments.
This patch adds support for 64 bit non-blocking delays in procedural
code. We fixed the procedural delay operator (blocking delays) earlier.
This patch mostly mimics what was done there. The continuous assignment
delay operator still needs to be fixed.
2009-02-17 10:32:11 -08:00
Cary R 7b1905b997 Add memory freeing and pool management for valgrind.
This patch adds code to free most of the memory when vvp
finishes. It also adds valgrind hooks to manage the various
memory pools. The functionality is enabled by passing
--with-valgrind to configure. It requires that the
valgrind/memcheck.h header from a recent version of
valgrind be available. It check for the existence of this
file, but not that it is new enough (version 3.1.3 is known
to not work and version 3.4.0 is known to work).

You can still use valgrind when this option is not given,
but you will have memory that is not released and the
memory pools show as a single block.

With this vvp is 100% clean for many of the tests in the
test suite. There are still a few things that need to be
cleaned up, but it should be much easier to find any real
leaks now.

Enabling this causes a negligible increase in run time and
memory. The memory could be a problem for very large
simulations. The increase in run time is only noticeable on
very short simulations where it should not matter.
2009-02-01 06:55:28 -08:00
Cary R ad3fcf3455 Fix a few memory leaks in vvp.
This patch fixes two memory leaks in the compile stage and one easy
fix in vpi/sys_display.c.
2009-01-21 19:35:47 -08:00
Cary R 2707a68d1b Fix more memory leaks in vvp and one in ivlpp.
This patch fixes some more memory leaks in vvp. Mostly related
to UDP compilation and one in find_scope() that was found when
testing the VPI code. The leak in ivlpp was that the define
temporary buffer not being freed when the lexor was finished.
2009-01-14 18:40:54 -08:00
Cary R c2605a5c9b Fix memory leaks in vvp and change vvp T_STRING token to be new based.
This patch fixes a bunch of memory leaks in vvp and converts the
T_STRING lexical token to be new based. There are still two
known leaks that I need to find a way to fix and likely some
unknown leaks that still need to be found and fixed.
2009-01-13 10:53:23 -08:00
Cary R cba8b42580 Make a plain $stime print in 10 digits (32 bits).
This patch makes $stime a unique call in display and returns
the lower 32 bits in a 10 digit field when it is called.
2009-01-09 16:58:13 -08:00
Stephen Williams d5f1d0e9eb Seperate islands from tran/switch islands
Tran islands are a kinds of island, so seperate the tran handling
from the core island concept. This will allow for creating new
kinds of islands. (Think analog.)
2008-11-29 10:05:31 -08:00
Cary R 6b76f76a3a Add the procedural signed power function.
This patch adds the procedural power function %pow/s for signed
values. This has bit based inputs and outputs, but uses the double
pow() function to calculate the value.
2008-11-28 10:33:45 -08:00
Cary R bbdf622ea5 Fix numerous problems with the divide and modulus operators.
This patch fixes a number of problems related to the divide and
modulus operators.

The net version (CA) of modulus did not support a signed version.

Division or modulus of a value wider than the machine word did
not correctly check for division by zero and return 'bx.

Fixed a problem in procedural modulus. The sign of the result is
only dependent on the L-value.

Division or modulus of a signed value that was the same width as
the machine word was creating an incorrect sign mask.

Division of a signed value that would fit into a single machine
word was not checking for division by zero.

Division or modulus of a wide value was always being done as
unsigned.

Added a negative operator for vvp_vector2_t. This made
implementing the signed wide division and modulus easier.
2008-11-07 19:58:00 -08:00
Stephen Williams 6cac1d2cab Add support for real/realtime arrays.
Support arrays of realtime variable arrays and net arrays. This
involved a simple fix to the ivl core parser, proper support in
the code generator, and rework the runtime support in vvp.
2008-11-01 20:44:03 -07:00
Martin Whitaker 18edf2f15f Rework of automatic task/function support.
This patch splits any VVP net functor that needs to access both
statically and automatically allocated state into two sub-classes,
one for handling operations on statically allocated state, the
other for handling operations on automatically allocated state.
This undoes the increase in run-time memory use introduced when
automatic task/function support was first introduced.

This patch also fixes various issues with event handling in automatic
scopes. Event expressions in automatic scopes may now reference either
statically or automatically allocated variables or arrays, or part
selects or word selects thereof. More complex expressions (e.g.
containing arithmetic or logical operators, function calls, etc.) are
not currently supported.

This patch introduces some error checking for language constructs
that may not reference automatically allocated variables. Further
error checking will follow in a subsequent patch.
2008-10-29 20:43:00 -07:00
Larry Doolittle c010145eaf Shadow reduction part 1
Start cleaning up shadowed variables, flagged by turning on -Wshadow.
No intended change in functionality.  Patch looks right, and is tested
to compile and run on my machine.  YMMV.
2008-10-09 11:55:26 -07:00
Martin Whitaker 7ebcc6b357 Support for automatic tasks and functions.
This patch adds support for automatic tasks and functions.
Refer to the overview in vvp/README.txt for details.
2008-09-27 15:51:16 -07:00
Cary R f7d3c7c711 Add non-blocking EC for arrays and other fixes.
This patch adds non-blocking event control for array words.
It also fixes a problem where the word used to put the
calculated delay for a non-blocking array assignment was
not being released. It also fixes the non-blocking array
assignments to correctly handle off the end/beginning part
selects.
2008-09-19 21:08:03 -07:00
Cary R 626394d198 Some event control assigns can be skipped so add an event clear.
Since some event control assignments can be skipped we need an
event control clear so that future %evctl statements do not fail
their assert. This patch adds %evctl/c and uses it in the compiler
as appropriate to keep the event control information in sync.
2008-09-19 20:04:51 -07:00
Cary R 8ffec473ef Add event control for vectors and parts of a vectors.
This patch adds full event control for vectors and parts of a
vector. It also fixes the other non-blocking part select code
to correctly handle a negative offset ([1:-2] of a [4:0] will
have an offset of -2).
2008-09-19 19:46:33 -07:00
Cary R 1e60754ff0 Partial non-blocking event control implementation
This patch pushes the non-blocking event control information to
the code generator. It adds the %evctl statements that are used
to put the event control information into the special thread
event control registers. The signed version (%evctl/s) required
the implementation of %ix/getv/s to load a signed value into
an index register. It then adds %assign/wr/e event control based
non-blocking assignment for real values. It also fixes the other
non-blocking real assignments to use Transport instead of inertial
delays.
2008-09-12 20:00:28 -07:00
Cary R 088c7f3feb Add calculated delay, real valued, non-blocking assignments.
This patch add the ability to do a non-blocking assignment
for real values using a non-constant (calculated) delay.
2008-09-09 20:09:49 -07:00
Larry Doolittle 66949122cf Non-controversial whitespace cleanup
Nothing to do with tab width!  Eliminates useless
trailing spaces and tabs, and nearly all <space><tab>
pairings.  No change to derived files (e.g., .vvp),
non-master files (e.g., lxt2_write.c) or the new tgt-vhdl
directory.

Low priority, simple entropy reduction.  Please apply
unless it deletes some steganographic content you want
to keep.
2008-09-04 21:31:30 -07:00
Cary R 27cdd27889 Add .cast/int and update .cast/real.
This patch adds .cast/int and updates .cast/real to act as a local
(temporary) net and to support either a signed or unsigned input.
The vvp_vector4_t class not can convert an arbitrarily sized double
to a vector value. This removes the restriction of lround().

Also document the new statements.
2008-06-20 19:45:18 -07:00
Stephen Williams 37723698dc Handle non-real operands to real division.
This handles the general case of a non-real operand to a real-valued
division. This can turn up if only 1 operand of a divide is real. In
this case the division as a whole is real and the other operand must
be cast to real.

This method creates an extra node, but it should be a very compact
node and this node does no evaluation tricks so in the run time should
be no more expensive then folding the cast into the .arith/div.r itself.
2008-06-17 17:07:19 -07:00
Stephen Williams 9013dcb527 Signed load-and-add for arrays.
The load-and-add for vectors %load/vp0/s can be combined with the
load-and-add for array words, and the %load/avp0/s added to round
out the combinations. This can make for fewer instructions when
words are padded in arithmetic expressions.
2008-06-14 19:59:57 -07:00
Stephen Williams 6f0d8e8dda Load_add_immediate to work with signed expressions
The %load/vp0 instruction adds a signed value to the signal value being
loaded, but it doesn't allow for a signed source vector. Add the
%load/vp0/s instruction that pads the loaded vector, and add the code
generator details to properly use it.
2008-06-13 20:23:40 -07:00
Stephen Williams 4914b734dc Obvious optimizations of vvp_vector8_t handling.
The vvp_vector8_t constructor and destructor involve memory allocation
so it is best to pass these objects by reference as much as possible.

Also have the islands take more care not to perform resolution if the
inputs aren't really different.

NOTE: This is a port of commit 2f4e5bf5b6
from the "performance" branch, without the resolver scheduling changes.
This was causing test suite variances with pr1820472.v. It looks like
there might be a race in that program anyhow, but for now leave out the
resolver scheduling changes so that the rest of this commit can go in.
2008-06-12 12:08:02 -07:00
Stephen Williams 70768176f9 Change bit select instruction to a part select.
There is no point in having a bit select instruction and running it in
a loop (always) when we can simply turn it into a part select instruction.
2008-06-10 17:29:47 -07:00
Stephen Williams 694a6ed4a1 Remove some unused opcodes.
Codes from a dfiferent era.
2008-06-10 16:33:34 -07:00
Stephen Williams 052870c0e5 And the vvp_island infrastructure to the vvp runtime.
The vvp_island classes are added, as well as support for tranif nodes
that use this concept. The result is a working implementation for
tranif0 and tranif1.

In the process, the symbol table functions were cleaned up and made
into templates for better type safety, and the vvp_net_ptr_t was
generalized so that it can be used by the branches in the island
implementation.

Also fix up the array handling to use the better symbol table support,
and to remember to clear its own table when linking is done.
2008-05-31 21:45:55 -07:00
Stephen Williams 5a0fe9ff83 Better use of immediate operands.
Clarify that operands are typically 32bits, and have the code generator
make better use of this.

Also improve the %movi implementation to work well with marger vectors.

Add the %andi instruction to use immediate operands.
2008-05-27 17:51:28 -07:00
Stephen Williams 007056d671 Remove last vestiges of the the .mem structures.
Before the .array support, we had .mem nodes. These are long since
removed because the arrays to all the jobs of the .mem nodes.
2008-05-20 16:57:50 -07:00
Stephen Williams 6632e4c33b Allow ports to be declared before arrays.
It is possible for the code generator to create .array/port objects
before the .array object that the port refereces, so use the resolv_list
to arrange for binding during cleanup.
2008-05-16 19:06:12 -07:00
Stephen Williams ca517b5519 Handle corner cases of abs(), min() and max()
The abs() function needs to be able to turn -0.0 into 0.0. This proved
to be too clunky (and perhaps impossible) to do with tests and jumps,
so add an %abs/wr opcode to do it using fabs().

The min/max functions need to take special care with the handling
of NaN operands. These matter, so generate the extra code to handle
them.
2008-05-06 22:19:59 -07:00
Stephen Williams 10ab5cf698 Merge branch 'verilog-ams' 2008-05-06 21:00:12 -07:00
Stephen Williams 523de1b69c Handle the abs() function in net context.
In net context we have to create a node that does the abs() function
for us. Elaborate that node and handle it all the way down to vvp.
2008-05-06 20:37:00 -07:00
Cary R 4f8b91e65c Add file and line information for parameters, etc.
This patch adds file and line information for parameters and
local parameters. It also adds file/line stubs for signals in
the tgt-* files. It adds the pform code needed to eventually
do genvar checks and passing of genvar file/line information.
It verifies that a genvar does not have the same name as a
parameter/local parameter.
2008-05-06 07:14:27 -07:00
Cary R 86a4025b58 Push file and line information for scopes to the runtime.
This patch adds code to push the file and line information
for scope objects (modules, functions, tasks, etc.) to the
runtime. For modules, this includes the definition fields.
2008-04-29 21:51:34 -07:00
Cary R 436e2fca13 Add ifnone functionality.
This patch adds ifnone functionality. It does not produce an
error when both an ifnone and an unconditional simple module
path are given. For this case the ifnone delays are ignored.
2008-04-29 11:55:32 -07:00
Stephen Williams 40fd07d46e Remove most dependencies on vvp_bit4_t encoding.
Remove dependencies on vvp_bit4_encoding outside of the vvp_net
core types. The table_functor_s class was the worst offfender and
was barely used, so it is now removed completely. There are a few
opcodes in vhtread.cc that also make vvvp_bit4_t encoding
assumptions (and used casts) and those have been fixed. There
were also various VPI interface functions that are fixed.
2008-04-20 19:21:41 -07:00
Cary R 6eb9825ab7 Add force/release and assign/deassign for real values.
This patch adds assign/deassign for real variables and force/release
for real variables and nets.
2008-04-17 20:18:20 -07:00
Cary R 9bb8e8146f Add assign/deassign to bit/part selects and other fixes
This patch adds the ability to assign/deassign a bit or part select.
It also cleans up the code and fixes some problem in the forcing of
strength aware nets.
2008-04-15 17:46:44 -07:00
Cary R 2be8534021 Add %assign/av/d opcode.
This patch adds a %assign/av/d opcode. This is a version of %assign/av
that allows a delay expression. Ultimately this allows a dynamically
indexed array to have a delay expression (non-constant delay value).
2008-04-09 21:24:37 -07:00
Cary R bb14ac1fe0 Add functionality to alias an individual word of an array.
This patch adds the functionality to alias an individual word
of an array.
2008-03-26 21:44:57 -07:00
Cary R 12f8af645f Add support for real parameters in vvp.
vvp did not have the ability to handle real parameters.
This patch fixes that omission. Parameters are only used
by vpi calls to get compile time information.
2008-03-26 18:04:57 -07:00
Cary R 234648231b Add bit/part select release for constants and add an error check.
This patch adds functionality to do a bit or part select release
when a constant value is forced to the net/register. It also adds an
error message when the user tries to force a signal to a bit/part
select. This is not currently handled by the run time, so is now
caught in the compiler (tgt-vvp). Where when this functionality is
needed, it will be easy to know what to do instead of trying to track
down some odd runtime functionality.

What this all means is that you can force a signal to an entire
signal or you can force a constant to any part of a signal (bit,
part or entire) and release any of the above. Technically the
release of a constant value does not have to match the force.
The runtime verifies that if you are releasing a signal driver
it is being done as a full release. I don't see an easy way to
check this in the compiler.

To fix the signal deficiencies we need to rework the force_link
code to allow multiple drivers and partial unlinking. Much of
this is in the runtime, but the %force/link operator may also
need to be changed like I did to the %release opcode.
2008-03-11 19:56:58 -07:00
Cary R fe72d02cf6 Major rework of the ternary operator elaboration code.
This patch reworks much of the ternary code to short circuit when
possible and supports real values better. It adds a blend operator
for real values that returns 0.0 when the values differ and the value
when they match. This deviates slightly from the standard which
specifies that the value for reals is always 0.0 when the conditional
is 'bx. There are also a couple bug fixes.

These fixes have not been ported to continuous assignments yet.
Ternary operators used at compile time and in procedural assignments
should be complete (short circuit and support real values).
2008-03-08 19:45:13 -08:00