6 Commits

Author	SHA1	Message	Date
Maciej Suminski	e4ba4b5acd	vhdlpp: Added means to use 'initial' and 'final' blocks during translation.	2015-12-01 10:33:20 +01:00
Arun Persaud	f5aafc32f9	updated FSF-address	2012-08-29 10:12:10 -07:00
Stephen Williams	98d928f6e0	Add support for VHDL for-generate	2011-10-30 17:10:19 -07:00
Stephen Williams	41601696cc	properly handle vhdl open ports in component instantiations.	2011-06-12 16:59:07 -07:00
Stephen Williams	fc25ccde06	Basic emit of sequential code ... Infrastructure for debug and emit of sequential statements in processes. This does not properly handle the actual semantics of the behavioral code, but it provides an infrastructure where we can handle all the tricky elaboration to come.	2011-05-15 11:07:42 -07:00
Stephen Williams	27b58a7f93	Reorganize architecture debug methods.	2011-05-15 08:57:19 -07:00