steve
71faebd6df
Make elaborate_expr methods aware of the width that the context
...
requires of it. In the process, fix sizing of the width of unary
minus is context determined sizes.
2006-06-02 04:48:49 +00:00
steve
a8b86ea3bb
More explicit datatype setup.
2006-05-01 20:47:58 +00:00
steve
0c9fb766b6
Get the data type of part select results right.
2006-04-30 05:17:48 +00:00
steve
4493e3f928
Chop down assign r-values that elaborate too wide.
2006-04-26 04:43:50 +00:00
steve
f001d0001a
Add support for generate loops w/ wires and gates.
2006-04-10 00:37:42 +00:00
steve
e8efa6df53
Fix instance arrays indexed by overridden parameters.
2006-03-30 01:49:07 +00:00
steve
368c27c9e4
Handle complex net node delays.
2006-01-03 05:22:14 +00:00
steve
58f182a159
Node delays can be more general expressions in structural contexts.
2006-01-02 05:33:19 +00:00
steve
0e044d6684
More precise about r-value width of constants.
2005-11-26 00:35:42 +00:00
steve
c02b3b8ac6
Reorganize signal part select handling, and add support for
...
indexed part selects.
Expand expression constant propagation to eliminate extra
sums in certain cases.
2005-11-10 13:28:11 +00:00
steve
16dc3ab4d4
Error message for invalid for-loop index variable.
2005-09-27 04:51:37 +00:00
steve
9fd16575d9
Support bool expressions and compares handle them optimally.
2005-09-14 02:53:13 +00:00
steve
4a8be3db9c
Implement bi-directional part selects.
2005-08-06 17:58:16 +00:00
steve
bc9f286954
More debug information.
2005-07-15 00:41:09 +00:00
steve
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
steve
657ac8168e
Debug messages.
2005-06-17 05:06:47 +00:00
steve
739a1839ed
Do sign extension of structuran nets.
2005-05-24 01:44:27 +00:00
steve
7796c8bcfb
Parameters cannot have their width changed.
2005-05-17 20:56:55 +00:00
steve
adbe734b6c
Some debug messages.
2005-05-13 05:12:39 +00:00
steve
365cfedd55
Update DFF support to new data flow.
2005-04-24 23:44:01 +00:00
steve
4ccbb4f0b2
Get rval width right for arguments into task calls.
2005-03-05 05:38:33 +00:00
steve
257e1f9516
Support shifts and divide.
2005-02-19 02:43:38 +00:00
steve
55b5bf9d39
distinguish between single port namy instances, and single instances many sub-ports.
2005-02-10 04:56:58 +00:00
steve
ee5bb5fcaf
Add the NetRepeat node, and code generator support.
2005-02-08 00:12:36 +00:00
steve
c23a35a033
Debug messages for PGAssign elaboration.
2005-01-30 01:42:05 +00:00
steve
25de448d34
Remove obsolete NetSubnet class.
2005-01-22 18:16:00 +00:00
steve
4d139b58aa
Properly pad vector widths in pgassign.
2005-01-12 03:17:36 +00:00
steve
9e94afe399
Use PartSelect/PV and VP to handle part selects through ports.
2005-01-09 20:16:00 +00:00
steve
8f2d679c8a
Unify elaboration of l-values for all proceedural assignments,
...
including assing, cassign and force.
Generate NetConcat devices for gate outputs that feed into a
vector results. Use this to hande gate arrays. Also let gate
arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
steve
3947d7dd33
Force r-value padded to width.
2004-12-15 17:09:11 +00:00
steve
d19e76a193
Fix r-value width of continuous assign.
2004-12-12 18:13:39 +00:00
steve
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
steve
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
steve
c10e572091
Support degenerat wait statements.
2004-09-05 21:07:26 +00:00
steve
9de786fc44
Add support for module instance arrays.
2004-09-05 17:44:41 +00:00
steve
8bf434754f
Propagate source line number in synthetic delay statements.
2004-06-30 15:32:02 +00:00
steve
76c0fe459c
Only pad the width of vector r-values.
2004-06-20 15:59:06 +00:00
steve
9949040285
Add support for the default_nettype directive.
2004-06-13 04:56:53 +00:00
steve
5472b27e1f
Rewire/generalize parsing an elaboration of
...
function return values to allow for better
speed and more type support.
2004-05-31 23:34:36 +00:00
steve
55ba131997
Handle wait with constant-false expression.
2004-05-25 03:42:58 +00:00
steve
c6453a0854
primitive ports can bind bi name.
2004-03-08 00:47:44 +00:00
steve
413932e406
Verilog2001 new style port declartions for primitives.
2004-03-08 00:10:29 +00:00
steve
9531920685
MOre thorough use of elab_and_eval function.
2004-03-07 20:04:10 +00:00
steve
177b6ffb6a
Addtrbute keys are perm_strings.
2004-02-20 18:53:33 +00:00
steve
27af95d402
Use perm_strings for named langiage items.
2004-02-18 17:11:54 +00:00
steve
6a02613fca
Get rid of useless warning.
2004-01-21 04:35:03 +00:00
steve
e617e4a98c
Handle wide expressions in wait condition.
2004-01-13 03:42:49 +00:00
steve
ee172bdccf
Attach line number information to for loop parts.
2003-10-26 04:49:51 +00:00
steve
39b2928ad8
Summary list of missing modules.
2003-09-25 00:25:14 +00:00
steve
6abe797963
Evaluate nb-assign r-values using elab_and_eval.
2003-09-20 06:08:53 +00:00