In rare cases, the reduction logic nodes may get vector part inputs.
This patch adds support for vector parts entering a reduction node.
Signed-off-by: Stephen Williams <steve@icarus.com>
The port input count assertion was triggering incorrectly. It was
comparing the count with the bytes instead of bits in a word.
Signed-off-by: Stephen Williams <steve@icarus.com>
The argument passed to $finish and $stop is not currently used, but it
is now passed down to the functions that may someday do something
useful with it (schedule_finish() and schedule_stop() in vvp/schedule.cc).
Be careful to include bitwise differences in double values, because
it is the bit pattern we are passing aroung, not the arithmetic value.
Signed-off-by: Stephen Williams <steve@icarus.com>
The runtime is a vvp runtime engine debug aid that allows for
detailed dump into a debug log. The trace is enabled by setting
the VVP_DEBUG variable and activating specific debug messages
in the vvp source.
Signed-off-by: Stephen Williams <steve@icarus.com>
Make varable drivers (reg vectors and real) propagate their initial
values using a special init scheduler queue. This causes the net to
be loaded with reasonable initial values.
Signed-off-by: Stephen Williams <steve@icarus.com>
Words of net arrays were incorrectly added to the scope. They should
only be attached to the array, and accessed as a word of the array.
Signed-off-by: Stephen Williams <steve@icarus.com>
Real value are vector width of 1, fix real literal to reflect this.
fix leaking real registers in code generation for function arguments.
Load of signal should handle conversion from real to vector. Function
arguments, type vector passed a real value, are an example where this
comes up.
Signed-off-by: Stephen Williams <steve@icarus.com>
Backslash-escapes are processed early, during elaboration, so that
escaped characters show up in all places with the calculated value.
This means the $display formatting will get processed strings and
should not process back-slashes again.
Signed-off-by: Stephen Williams <steve@icarus.com>
Arrays of nets that have all their words collapsed together can become
a collapsed array as a whole. Add support for this case in the vvp code
generator and runtime.
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
Stephen Williams
Cary R
steve