f5220c54f1
Handle variables in process statements
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Parse variables declared in the declaration section of process
statements, and support variable assignment statements.
2011-08-17 20:19:15 -07:00
72769146ee
Remove all the user code compilation warnings
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Remove all the compilation warnings that are from user changeable code.
There are still some warnings related to the flex generated lexor code.
2011-07-30 09:37:14 -07:00
de356b03c8
Fix most of the cppcheck warnings in the vhdlpp directory.
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Mostly using size() vs empty() in the STL and a missing initialization.
2011-07-30 09:35:12 -07:00
60deb775ca
Add support for VHDL's loop statements
2011-07-12 19:20:04 -07:00
ad31eaaea8
Add parser support for VHDL's procedure call
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Parse procedure calls and put them into
abstract syntax tree. Elaboration and emission
still has to be done.
2011-07-08 18:10:30 -07:00
d14f60f28a
Elaborate and emit vhdl elsif sections.
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The IfStatement contains a list of elsif sections that need
to be elaborated/emitted in the middle of the true and false
clauses.
2011-06-22 18:13:40 -07:00
fc25ccde06
Basic emit of sequential code
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Infrastructure for debug and emit of sequential statements in processes.
This does not properly handle the actual semantics of the behavioral
code, but it provides an infrastructure where we can handle all the
tricky elaboration to come.
2011-05-15 11:07:42 -07:00
Stephen Williams
Cary R
Pawel Szostek