4 Commits

Include renames

Author	SHA1	Message	Date
Cary R	ef931e2e0d	Spelling and space cleanup	2023-05-31 22:44:13 -07:00
Martin Whitaker	deeac2edfe	Fix broken example code (discussion #922) ... 'output' is a keyword, so can't be used as a signal name.	2023-05-15 19:42:47 +01:00
Emilio Miralles	48f486ef83	Fix verilog formatting in usage docs code-blocks	2022-04-13 16:16:32 +02:00
Stephen Williams	2f091c8f45	Start Icarus Verilog Documentation using Sphinx ... Embed the Icarus Verilog documentation, and format it so that the Sphinx tools can process it into html or other formats. This will make the documentation easier to keep up to date with the actual software.	2022-04-10 19:24:08 -07:00