Commit Graph

1904 Commits

Author SHA1 Message Date
Cary R 3fc9ad2db0 Add support for the wild compare operators ==? and !=? 2017-11-17 19:32:50 -08:00
Cary R f03033e612 Update flex destroy routines to work for version 2.6 and greater 2017-11-16 19:11:50 -08:00
Martin Whitaker ad83a135e5 Fix assertion failure in vvp wide functor.
If the functor output is read before any values have propagated to
the functor inputs, the internal storage won't have been initialised.
2017-11-08 20:35:18 +00:00
Martin Whitaker c622d372f9 Fix for GitHub issue #169: nets can get given wrong scope in VPI.
In vvp, the __vpiSignal object holds a pointer to the scope containing
the signal. This was getting set to the current scope when the net was
finally resolved, rather than to the scope where the net was declared.
2017-11-07 18:48:48 +00:00
Cary R d9478bd837 Update cppcheck waiver files 2017-10-23 00:21:51 -07:00
Martin Whitaker 5ca058bfb5 Add support for darray initialisation from another darray.
Fixes GitHub issue #164.
2017-10-08 17:51:33 +01:00
Martin Whitaker e315cafa01 Fix for GitHub issue #165 : assertion failure on thread join.
If a thread becomes detached due to a join_any statement, that
thread must not attempt to join its parent, even if the parent
is waiting on a subsequent join statement.
2017-10-07 16:41:26 +01:00
Martin Whitaker a1a7f5deff Fix error in last commit. 2017-09-17 19:58:13 +01:00
Martin Whitaker 0bed890bc6 Fix use after free bug in vvp when a task or function is disabled.
Use test_joinable() and do_join() to ensure everything gets cleaned
up before the thread is reaped. This should fix br1016, br1017, and
br1018.
2017-09-17 19:48:54 +01:00
Martin Whitaker ac87138c44 Fix for br1019 - allow multiple array words to be attached to a vpi callback.
Normally there is at most one signal attached to a vvp functor, but
due to port collapsing, there can be more than one. If these signals
are array words, we need to trigger vpi callbacks on all the associated
arrays when the functor value changes.
2017-08-12 12:23:43 +01:00
Cary R 62e0f59b07 No need for class in previous patch 2017-06-19 21:26:24 -07:00
Cary R 10ef0eb109 Fix class versus struct warning in clang 2017-06-19 21:26:16 -07:00
Martin Whitaker e2be64558b Ensure value passed to named event via vpi_put_value() is initialised.
The __vpiNamedEvent::vpi_put_value() function ignores the value, but
intermediate code looks at it.
2017-06-15 09:11:11 +01:00
Martin Whitaker 3de7c234f7 Implement vpi_put_value() for named events (GitHub issue #158). 2017-06-15 08:47:29 +01:00
Johann Klammer c79df7c44b fix failing VPI callbacks the vpip_cur_task was left dangling 2017-01-01 17:44:54 -08:00
Martin Whitaker 0fdf29e099 Fix for GitHub issue #117 - delays in VPI simulation time callbacks.
Change cbReadWriteSynch and cbReadOnlySynch to interpret the passed
time value as a relative delay, not an absolute time. This matches
the behaviour of other simulators.
2016-09-25 20:43:58 +01:00
Stephen Williams e56e52bc42 Merge branch 'master' of github.com:steveicarus/iverilog 2016-09-19 12:59:41 -07:00
Maciej Suminski f32b64f497 Fixed warnings about shifting a negative value 2016-09-19 12:54:15 -07:00
Cary R 5853e32f82 Fix some cppcheck warning issues 2016-09-13 23:45:25 -07:00
Stephen Williams d44c814bab Remove .alias records from vvp generated code.
Net arrays can be handled by nets directly, instead of creating
.alias records.
2016-08-31 14:05:09 -07:00
Cary R a2fbdeff78 Add some pass by reference to vvp 2016-08-14 22:26:16 -07:00
Cary R ad5a7f7ca3 Update cppcheck vvp suppression file 2016-08-14 21:18:55 -07:00
Cary R d0e0776910 Make the base class match the derived classes regarding passing by reference 2016-08-14 21:18:44 -07:00
Martin Whitaker 7bed181f68 Support timescales in design units that aren't inside a module.
SystemVerilog allows tasks, functions, and classes to be defined at the
root level or inside packages, so we can't rely on an enclosing module
being present to provide the timescale.
2016-07-22 22:48:20 +01:00
Yury Gribov 43cd693fe0 Put start events to proper queue. 2016-07-17 09:47:08 -07:00
Michele Castellana 9ad46044b4 Cleanup 2016-06-30 17:47:34 +02:00
Martin Whitaker 8234f1845d Fix for GitHub issue #106 - prevent VPI writes during read-only synch. 2016-06-09 21:27:20 +01:00
Martin Whitaker 61c82d2cb0 Handle mixed continuous and non-blocking assignments to same vector.
SystemVerilog allows a mixture of procedural and continuous assignments
to be applied to different parts of the same vector. The previous attempt
to make this work for non-blocking assignments was flawed (see preceding
fix for vvp_fun_part_pv::recv_vec4_pv). Instead, handle this case by
converting the non-blocking assignment into a delayed force statement,
which matches the way mixed continuous and blocking assignments are
handled.
2016-05-10 22:16:40 +01:00
Martin Whitaker 0c66116f51 Fix for GitHub issue #103 - vvp assertion failure on part select propagation.
The implementation of vvp_fun_part_pv::recv_vec4_pv was incorrect, and
propagated the incoming widths rather than the stored widths.
2016-05-10 21:59:21 +01:00
Martin Whitaker 6e5ed73b09 Extended fix for GitHub issue #99.
Most vvp functors need to support recv_vec4_pv. Any that are strength-aware
also need to support recv_vec8_pv. Note the simplifying assumption that is
documented in the base class recv_vec4_pv_ implementation.
2016-04-18 23:47:43 +01:00
Martin Whitaker b2f7d09f0d Fix GitHub issue #99 - recv_vec4_pv not implemented for arithmetic functors.
Also initialise the stored operand values to 'bz instead of 'bx to get
the correct results when bits are not driven.
2016-04-04 22:29:54 +01:00
Larry Doolittle 4521be4510 More spelling, comments only 2016-04-01 11:02:34 -07:00
Larry Doolittle 89edf62206 Capitalize Verilog in a few places 2016-04-01 11:02:24 -07:00
Martin Whitaker 0dcb46e4c4 Fix shadow warning. 2016-03-19 14:42:34 +00:00
Martin Whitaker 54feb89bf5 For SystemVerilog, run variable initialization before main simulation starts. 2016-03-19 13:46:09 +00:00
Stephen Williams 78a49eacef Merge branch 'master' of github.com:steveicarus/iverilog 2016-03-14 12:26:12 -07:00
Larry Doolittle 1784488096 Spelling and whitespace 2016-03-14 12:25:50 -07:00
Martin Whitaker dc189fec8c Added new vvp latch statement to README file. 2016-03-12 12:14:03 +00:00
Martin Whitaker 99afea6946 Added support for LPM latches to vvp. 2016-03-12 09:04:51 +00:00
Maciej Suminski 9cf1dcbae2 vvp: Corrected vvp_net_fun_t::recv_vec4_pv() (commit de968e18) 2016-03-07 09:54:28 +01:00
Maciej Suminski 69b7c000d0 vvp: Implemented vvp_net_fun_t::recv_vec4_pv(). 2016-03-07 09:54:28 +01:00
Stephen Williams 9a7f31c728 Functions that return strings pass the return value on the stack. 2016-03-01 15:38:28 -08:00
Cary R 7d21891147 Fix space issues. 2016-02-28 22:09:39 -08:00
Martin Whitaker 46105e0c5a Delayed output of vvp dff to end of current time slot.
Flip-flops are generally modelled in behavioural code using non-blocking
assignments. This change makes the synthesised code behave the same as
the behavioural code. It's a more realistic model of a real flip-flop
too, which will always have some clock-to-output delay.
2016-02-21 00:00:39 +00:00
Cary R 3e52b2be66 Fix valgrind compile 2016-02-03 22:25:57 -08:00
Cary R 841593d013 Remove some compile warnings 2016-02-03 21:40:18 -08:00
Stephen Williams 76ced1cf7c Fix %ret/* and %retload/* opcodes to search up for function thread. 2016-02-01 14:51:18 -08:00
Stephen Williams f494b478cc Merge branch 'master' into return-stack
# Conflicts:
#	sv_vpi_user.h
2016-02-01 14:47:44 -08:00
Stephen Williams ce692f90ad Implement and use the %retload/real opcode. 2016-02-01 09:31:06 -08:00
Stephen Williams c114edfa6c Handle void functions with new .scope format. 2016-02-01 09:29:49 -08:00