Commit Graph

276 Commits

Author SHA1 Message Date
Martin Whitaker 3f49dfcd97 Fix translation of module path connection type in vlog95 target.
The target API needed to be changed to pass the connection type
through to the target code generator.
2020-04-02 12:40:59 +01:00
Martin Whitaker 465e0d2710 Allow classes to reference declarations in their enclosing scope(s).
The original implementation made each class a root scope. They should
be added to the scope hierarchy just like any other declaration.
2019-12-22 10:46:38 +00:00
Stephen Williams befc91340c Parse and elaborate unique and priority case statements
The unique, unique0, and priority keywords can decorate case statements
to tell the run time (or synthesis) to do extra tests (or make extra
assumptions). These tests are not implemented in the vvp run time, but
now the decorations make it to the code generators.
2019-10-05 16:23:04 -07:00
Martin Whitaker f1608e163f Fix implicit fallthrough warnings when building with recent GCC. 2018-10-06 20:15:42 +01:00
Cary R 84d0df8a8a Pass to the targets if an implicit T0 trigger event is needed. 2017-12-03 20:17:42 -08:00
Cary R 3fc9ad2db0 Add support for the wild compare operators ==? and !=? 2017-11-17 19:32:50 -08:00
Martin Whitaker 988816c0b1 Support separate compilation units in SystemVerilog.
The compilation unit scope is now treated as a specialised form of
package (with an automatically generated name). All items declared
outside a design element are added to the current compilation unit
package. Apart from when searching for a symbol, once we get into
elaboration we can treat these just like any other package.
2017-10-31 20:38:59 +00:00
Cary R 7d78f5b2ea A few updates based on cppcheck results 2017-10-23 00:22:01 -07:00
Michele Castellana 0aa5487214 Check pointers before dereferencing 2016-06-30 17:47:34 +02:00
Martin Whitaker 5dfc9fdefb Code and comment cleanup for latches in target interface. 2016-03-12 00:10:47 +00:00
Johann Klammer 35a61b4680 Add LATCH to target interface 2016-03-11 23:43:58 +00:00
Stephen Williams fac7de2133 Better handle some different function types in the .scope setup. 2016-01-31 16:16:02 -08:00
Stephen Williams 604a62379c Make .scope aware of return type, and extend %ret/vec4 operands
The .scope needs to be aware of return types so that the %call/vec4
function knows how to intialize the return value. We also need to
extend the %ret/vec4 to support writing parts of the return value.
2016-01-31 15:29:52 -08:00
Christian Taedcke be06aa39ab Remove unused static function basename. 2015-10-31 11:17:18 +01:00
Martin Whitaker b242663cae Support negedge flip-flops in synthesis and in vvp.
Also extend the support for FF asynchronous set values to vvp and
fix the dff functor in vvp to correctly model asynchronous set/clr
behaviour.
2015-06-13 16:47:57 +01:00
Cary R c25538d750 Pass the integer type for enumerations to the IVL target stage 2014-10-31 18:09:19 -07:00
Stephen Williams 338a0eb11a Get $root scope tasks/fuctions down to the ivl_target API. 2014-10-02 14:09:27 -07:00
Stephen Williams ea4b000be6 Get arrayed property expressions down to the ivl_target API. 2014-09-15 17:37:30 -07:00
Stephen Williams d5fb0f4344 Handle some tricky conditions assignments to parts.
When for example assigning to foo[<x>] within a contitional, and
doing synthesis, we need to create a NetSubstitute device to manage
the l-value bit selects.
2014-07-14 16:46:58 -07:00
Stephen Williams ccce9d9271 Merge branch 'master' into x-sizer5 2014-06-14 19:13:42 -07:00
Stephen Williams f8dc430fe5 Add synthesis support for casez statements.
This generates an EQZ LPM device that carries the case-z-ness to
the code generator.

Also add to the vvp code generator support for the EQZ device so
that the synthesis results can be simulated.

Account for the wildcard devices in the sizer.
2014-06-13 18:01:41 -07:00
Larry Doolittle 35a8485a44 Fix some weird lint found by clang
Small stuff, no behavior change expected.
2014-06-09 10:44:48 -07:00
Cary R 9544cb516d Fix some compile warnings 2013-11-24 14:35:44 -08:00
Stephen Williams fa8d35ae9c Support nested l-value objects
This allows for syntax like a.b.c where a is a class with member
b, which is a class with member c, and so on. The handling is mostly
for the support of compound objects like classes.
2013-11-22 19:54:42 -08:00
Stephen Williams 37ac1ed474 Clean up dead code in ivl_lval_t handling. 2013-11-22 12:02:03 -08:00
Stephen Williams 3945b9df45 Elaborate darray new element initializer to ivl_target API 2013-10-19 15:34:15 -07:00
Stephen Williams 2030e06988 Parse/elaborate some array-patterns down to the ivl_target API. 2013-10-19 15:34:14 -07:00
Cary R d8f945be23 Add support for SV do/while 2013-09-16 20:02:09 -07:00
Stephen Williams 01b81e0dbc Implement the ivl_target ivl_scope_child functions.
These are a more convenient way of iterating through child scopes.
2013-08-01 17:28:03 -07:00
Cary R e30334e527 Add ivl_parameter_width() function to ivl interface 2013-07-09 18:22:40 -07:00
Cary R d08e0270e4 Add support for getting parameter MSB, LSB and sign from the ivl interface 2013-07-04 11:29:25 -07:00
Stephen Williams 8e559e4e91 Support shallow copy as far as the ivl_target API. 2013-04-27 19:54:13 -07:00
Stephen Williams b122ec2a1a parameter table in ivl_scope_s uses vector instead of C arrays. 2013-04-08 18:20:39 -07:00
Stephen Williams fb23493a98 Class methods down to the code generator
Emit the elaborated class methods. Also generate root scopes to
represent the classes in order to hold the methods. These scopes
can also in the future be used to implement static properties.
2013-03-24 15:12:35 -07:00
Stephen Williams 60cb78e4ab Add packages and their own scope.
This makes <pkg>::<name> work properly, and also makes the
package descriptions available through VPI.
2013-02-17 17:00:15 -08:00
Stephen Williams 751587e112 PV-to-concat belnding should use a strength-aware concat. 2013-02-02 10:44:16 -08:00
Stephen Williams 0375ff3923 Handle some different integral types is class properties. 2013-01-27 20:10:25 -08:00
Stephen Williams 860419a346 Draft run-time support for SystemVerilog class objects.
This provides the ivl_target.h interface for class definitions
and expressions, the vvp code generator support for class objects
and properties, and the vvp run time support. Trivial class objects
now seem to work.
2012-12-10 19:20:02 -08:00
Stephen Williams 70dff035a2 ivl_target API for class types with properties. 2012-12-10 19:20:02 -08:00
Stephen Williams 318a4033b8 Flesh out class type elaboration
Add properties to the classes, and elaborate expressions that
have class properties. Describe class object property references
all the way down to the stub target.
2012-12-10 19:20:02 -08:00
Stephen Williams b6eb86d696 Blend new_darray and new_class expression nodes. 2012-12-10 19:13:43 -08:00
Stephen Williams a2d980540d Get some type information to the "new" expression for darrays. 2012-10-14 17:16:47 -07:00
Stephen Williams 1aa21aa9e8 ivl_target interface to packed type details.
The darray in particular needs to know about the subtype info.
In the process, clean up some of the type information.
2012-10-14 17:16:47 -07:00
Stephen Williams 4e76912331 ivl_target access to type information. 2012-10-14 17:16:47 -07:00
Stephen Williams 494dc876a5 Move net vector properties to netvector_t object. 2012-10-14 17:16:47 -07:00
Stephen Williams 0bdabab4fb Rework packed dimensions handling
Make packed structs more obviously parts of a vector.
Handle arrays of structs in certain cases.
2012-09-03 16:00:10 -07:00
Arun Persaud f5aafc32f9 updated FSF-address 2012-08-29 10:12:10 -07:00
Cary R 7ce8a9b01c Fix some cppcheck warnings in the main directory 2012-08-08 11:28:20 -07:00
Stephen Williams 14f229de30 Parse support for dynamic arrays.
This includes limited support for dynamic arrays down to the code
generator, and some stubs in the vvp code generator and vvp run time.
2012-07-22 10:52:06 -07:00
Andrew Stevens 9b3d20239a Extend VPI and build to for SIMetrix cosimulation
Added: basic vpiPort VPI Objects for vpiModulkes
    vpiDirection, vpiPortIndex,   vpiName, vpiSize attributes

   Since ports do not exist as net-like entities (nets either side
   module instance boundaries are in effect connect directly in
   the language front-ends internal representation) the port information
   is effectively just meta-data passed through t-dll  interface and
   output as a additional annotation of module scopes in vvp.

Added: vpiLocalParam attribute for vpiParameter VPI objects

Added: support build for 32-bit target on 64-bit host (--with-m32
   option to configure.in and minor tweaks to Makefiles and systemc-vpi).
2012-06-07 08:00:02 -07:00