If there are errors when parsing a file, it is not safe to elaborate any
modules that have been found in that file.
(cherry picked from commit 0cb1ebddf1)
bison 3.4.1 writes the header file before the c++ file. Our makefile
rules make the header files depend on the c++ files, so we need to
fix the timestamps accordingly.
(cherry picked from commit 5bb6c7f53a)
The signed version of the power operation in vvp should only be used
if the exponent is signed. Both signed and unsigned versions will
produce the correct result regardless of the type of the base operand,
provided it has been appropriately extended to the result size.
(cherry picked from commit ffb34861cf)
When vpi_handle_by_name() iterates over the VPI objects in a scope, handle
the case that vpi_get_str() returns a null value. This currently occurs if
the scope contains an enum type definition, as vpi_get_str() is not
implemented for __vpiEnumTypespec.
(cherry picked from commit 51a13e883a)
The host triplet for MinGW-w64 has changed to more closely match that
for MinGW, so we need to update the pattern in the test.
(cherry picked from commit fdf353af29)
Note we only want these enabled when building the compiler and runtime
binaries. If we included the ICARUS_VPI_CONST definition in the global
CPP_FLAGS, that would propagate to the flags used by iverilog-vpi, so
would affect compilation of user VPI code.
(cherry picked from commit 542fe2cf77)
- allow ICARUS_VPI_CONST to be pre-defined by the user
- use it for sizetf as well as for compiletf and calltf
- fix remaining warnings when it is defined as 'const'
(cherry picked from commit 0d494da702)
Currently $display et al. output nothing when the expression
corresponding to a %c format specification has the value 0. As
Verilog provides no other way to write raw bytes to a file, we
should allow 0 values to be written. Other simulators allow this.
(cherry picked from commit b066a5815e)
When performing a signed division or modulus operation using native
arithmetic, trap the special case that the numerator is the minimum
integer value and the denominator is -1, as this gives an undefined
result in C++.
(cherry picked from commit 7ad5b59a6f)
The code in vpi_callback.cc is replicated in vpi_vthr_vector.cc,
so we have to replicate the fix. This should really be factored
out.
(cherry picked from commit 6e49ab10ec)
In traditional Verilog, each task_port_item must have an explicit port
direction.
In SystemVerilog, if the port direction is not specified, it should be
inherited from the preceding task_port_item for that task/function, and
only the first task_port_item should infer the direction to be 'input'.
(cherry picked from commit 6b1b402a79)
Martin Whitaker
Maciej Kurc
Cary R
Stephen Williams
Konst Mayer
Yury Gribov