Commit Graph

58 Commits

Author SHA1 Message Date
Stephen Williams e172b4d9bc Add support for unary abs and not operators.
While I'm at it, do a little refactoring of the handling of binary
expressions to reduce code duplication.
2011-02-20 17:03:46 -08:00
Stephen Williams cbb213d79e Support for some arithmetic operators. 2011-02-19 17:47:30 -08:00
Stephen Williams 7d552980a6 Elaborate array subtypes of ports.
There are internal types that are unbounded arrays. Allow subtype
syntax that creates bounded versions of these arrays, and elaborate
them as vectors at port boundaries. This makes some interesting types
work out.

Also start replacing vhdlint and vhdlreal with int64_t and double,
which are reasonable values for universal_integer and universal_real
from the VHDL standard. I need these cleaned up because the ints in
particular are used for the literal expressions in array index constraints.
2011-02-13 19:01:21 -08:00
Stephen Williams f32ede23b7 Do type mapping in the parser.
In VHDL, types are declared before they are used, so it is possible
to do type binding during parse. This makes the parser a little bit
cleaner.
2011-02-13 16:54:56 -08:00
Stephen Williams 5914617727 Clean up entity interface. 2011-02-13 16:48:52 -08:00
Stephen Williams 769159d053 Add parse decorations for expressions.
Elaboration will need a parse tree for expressions. Create one for
the expression types that are currently supported. Also add rules
and the keywords for all the remaining binary logical operators.
2011-02-13 16:47:05 -08:00
Stephen Williams 3ca0a482cf Annotate the parse of simple concurrent statements. 2011-02-13 16:43:45 -08:00
Stephen Williams 30d689016a Create an Architecture class and bind them to their entities. 2011-02-13 16:43:04 -08:00