This patch adds code to the compiler so that a constant string
in a structural context can maintain the string property. This
is needed but not currently implemented in vvp (it's still
converted to a number). A pending patch for the vlog95 target
does use this new information.
This patch allows the compiler to perform early elaboration
of functions if they are encountered in expressions that are
elaborated before the function would normally be elaborated.
This makes the function available for constant evaluation.
Suitable error messages are generated if a function that is
used in a constant expression is not a valid constant function.
This patch adds code that allows the targets to determine if a logical
gate came from a continuous assignment. This helps some of the targets
generate code that more closely matches the input.
It also reworks/simplifies the synthesis of && and || since the
compiler has already converted the two operands to single bit form
and fixes a mismatched delete from a previous patch.
This patch adds some preliminary module port information to the ivl
interface. This may change as I investigate exactly what is needed.
It also fixes a few minor bugs (a missed local variable and spacing)
This patch modifies the compiler and the ivl interface to pass the
type of indexed part select that is being represented (up/down) in
a procedural L-value or R-value. This is needed by any back end that
wants to correctly denormalize the (zero based) base expression.
This patch adds support to the compiler/ivl interface for getting the
original UDP definition port names. ivl_udp_port() was added to get
this information.
This patch adds/fixes the following:
Adds file/line information to a UDP definition.
Prints an error message if a UDP is passed signals wider than 1 bit.
A UDP should supports a range, but the compiler currently does not.
Add scope information for constants.
Fix the Icarus extension UDP table entry element 'h' to use h.
The ivl_udp_init() value is a char not unsigned.
Add FILE_NAME() for a bunch more of the ivl interface objects.
It was documented that ivl_scope_port(s)() could be used with tasks,
but the code did not support this. This patch adds that functionality
as documented. It also removes the documentation for ivl_lval_mem()
since that function no longer exists.
The compiler currently performs parameter expression elaboration before
performing parameter overrides. This means that the information needed
to correctly determine the expression type and width may not be available
at the time elaboration is performed. This patch reworks the code to
delay elaboration until after all overrides have been performed. It
also provides a new -g option that controls how the width of parameter
expressions is calculated when the parameter itself is unsized.
This gets the enumeration type through to the ivl_target API so
that code generators can do something with it. Generate stub
output with tgt-stub, and generate the proper vvp run time to
make simple enumerations work from end to end.
This patch covers more than it should. It removes many of the -Wextra
warnings in the main ivl directory. It also makes some minor code
improvements, adds support for constant logicals in eval_tree (&&/||),
adds support for correctly sign extending === and !==, it starts to
standardize the eval_tree debug messages and fixes a strength bug
in the target interface (found with -Wextra). The rest of the warnings
and eval_tree() rework will need to come as a second patch.
When enum names are used as r-values in expressions, use their
values. Treat the enum names similar to (but not exactly as)
localparams so that they fit into the rest of the elaboration
flow naturally.
BOOL values have a specific cast from LOGIC, this node takes care
of it. Also arrange for the elaboration to insert them in the right
planes and for the code generator to generate them.
SystemVerilog allows variables to be either variables or unresolved
nets, depending on how they are used. If they are assigned by
procedural code, then they are variables. If they are assigned
by a continuous assignment, they are unresolved nets. Note that
they cannot be both, and when they are unresolved nets they can
only be assigned once.
This patch adds the ability to call a system function as a task for
the SystemVerilog generation (-g2009). The return value is really
calculated, but it is ignored.
Elaborate conditional assignments with BUFZ devices that do *NOT*
preserve strengths. Add a BUFT (transparent) device that can be
used in those cases where I really need a transparent buffer.
A real delay must be scaled and rounded using the local precision
before it is finally scaled to the simulation time units. This
patch fixes the compiler to do this correctly or generate the
correct code for run time calculated delays. Delays in a CA
already worked correctly. The run time was also fixed to scale
modpath (SDF back annotation) delays correctly.
This patch adds support for passing the delay selection to vvp.
It adds a new header :ivl_delay_selection "<value>"; that has
the values TYPICAL, MINIMUM or MAXIMUM depending on the -T
flag to iverilog. This information is needed by $sdf_annotate
to select that appropriate value for a triplet when
"TOOL_CONTROL" is specified (default).
Creation of implicit nets requires knowledge of whether an identifier
has been declared before it is used. Currently implicit nets are
created during elaboration, but by this stage the order of declaration
and use is not known. This patch moves the creation of implicit nets
into the parser stage.
It turns out that although there was all kinds of code to manage
these members, there were no uses anywhere. It must have been a
legacy from a previous era. So remove the dead code so that it
doesn't confuse me again.
Remove some wasteful and excess scans of the Nexus of some links,
and remove dead code so we can see what we're doing. Also inline
some commonly used and trivial functions.
Once code generation starts, the Nexus structure no longer needs to
support fast insertion/connect operations. So have the code generator
lock down the Nexus structures and adjust the Link lists for optimal
access during readout.
When netlists get very large, the Nexus::connect() method tickles
the O(N) performance and elaboration gets very slow. Rework the
connect method to be O(C), for a drastic performance boost for
large designs.
This simplifies and reorganizes this function in order to improve
the performance of this function by a constant factor. I think we
really need to improve this by an entire order (and not just a
simple factor) but this helps.
It turns out that it is possible for an otherwise constant net
mux to be non-constant if there is a force that can drive the
net. This can be detected as an l-value reference to an otherwise
constant selector.
If a signed signal is driving a part select in a CA and the width
is less than 32 bits. the value will be zero extended and will
not work for negative values. This patch adds a warning that this
could happen. This will be fixed in development.
This patch is a major rewrite of the indexed part selects (+: and -:).
It made the following enhancements:
1. Make indexed part selects work correctly with both big and little
endian vectors.
2. Add a warning flag that warns about constant out of bounds/or 'bx
indexed selects.
3. Moved the -: parameter code to its own routine.
4. Added support for straddling before part selects in a CA.
5. Added more assert(! number_is_unknown) statements.
6. Add warning for &PV<> select with a signed index signal that is
less than the width of an int. This will be fixed later.
7. Add support for loading a 'bx/'bz constant into a numeric register.
8. Add a number of signed value fixes to the compiler/code generator.
9. Major fix of draw_select_expr() in the code generator.
This patch adds genvars to the elaboration process. It adds checks
that a genvar is defined for a generate loop and that a genvar does
not conflict with any other items in its name space.
This patch adds -g2001-noconfig command line flag. The compiler
already supported this with `begin_keywords. Document this in
the manual page and fix a few other issues.
Fix endgenerate to be a 2001 keyword and add a few missing
keywords at the appropriate standard level e.g.(unsigned).
Add uwire and deprecate wone. wone used to just convert without
a warning to a wire. uwire will display a warning that it is
being converted to a wire without a check. wone is converted to
a uwire with a warning and then prints the uwire message. The
uwire message will be replaced with a real check fairly soon.
This patch adds real functionality for `celldefine and pushes this
property to the run time which can access this with vpiCellInstance.
This is technically only available for a module, but all scopes
have the property and only modules should return true when the
'endmodule' is between a `celldefine and `endcelldefine directive.
In 1364-2005 it is an explicit error to take the select of a scalar
or real value. We added the checks for real a while ago. This patch
adds the functionality for scalar values. In the future we may want
to push the scalar property to the run time.
This patch add code to print a warning message if it finds both a
default and `timescale based delays. The -Wall or more specifically
the -Wtimescale flag can be used to find the module with the missing
`timescale directive.
The arithmetic operands are signed only if both operands are signed.
If the expression is unsigned, then the expression as a whole needs
to be processed as unsigned in order to get padding right.
Cary R
Martin Whitaker
Larry Doolittle
Stephen Williams