Commit Graph

1 Commits

Author SHA1 Message Date
Lars-Peter Clausen 9d37878aa7 Add regression test for shortreal module ports
Check that module ports can have the shortreal data type.

Note that SystemVerilog does not allow nets to be of shortreal type.
Supporting net ports with a shortreal type is a Icarus extension.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-21 10:18:12 +02:00