Add regression test for shortreal module ports

Check that module ports can have the shortreal data type.

Note that SystemVerilog does not allow nets to be of shortreal type.
Supporting net ports with a shortreal type is a Icarus extension.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>

ivtest/ivltests/module_port_shortreal.v

@@ -0,0 +1,30 @@
+// Check that shortreal module ports are supported
+
+module M (
+  input shortreal in,
+  output shortreal out
+);
+
+  assign out = in * 10.1;
+
+endmodule
+
+module test;
+
+  shortreal r;
+
+  M m (
+    .in (1.23),
+    .out (r)
+  );
+
+  initial begin
+    #1
+    if (r == 12.423) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/regress-ivl1.list

@@ -225,6 +225,7 @@ ca_var_delay		normal			ivltests
 cast_real_signed	normal			ivltests
 cast_real_unsigned	normal			ivltests
 delayed_sfunc		normal,-gspecify	ivltests gold=delayed_sfunc.gold
+module_port_shortreal	normal,-g2005-sv	ivltests # shortreal
 pr1861212c		normal			ivltests gold=pr1861212.gold
 pr1864110a		normal			ivltests gold=pr1864110a.gold
 pr1864110b		normal			ivltests gold=pr1864110b.gold

ivtest/regress-vlog95.list

@@ -134,6 +134,7 @@ implicit_cast5		CE,-g2009,-pallowsigned=1	ivltests
 implicit_cast6		CE,-g2009,-pallowsigned=1	ivltests
 implicit_cast12		CE,-g2009,-pallowsigned=1	ivltests
 implicit_cast13		CE,-g2009,-pallowsigned=1	ivltests
+module_port_shortreal	CE,-g2005-sv		ivltests
 pr1861212c		CE			ivltests
 pr1864110a		CE			ivltests
 pr1864110b		CE			ivltests