iverilog

Commit Graph

Author	SHA1	Message	Date
Stephen Williams	148600814d	Handle std_logic_vector library output stream When writing arrays to the work library, handle the special case that it is an array of std_logic and write a std_logic_vector declaration instead. This makes for a more compact description.	2011-07-23 10:44:36 -07:00
Stephen Williams	38854822da	Write package headers to a library file Build up a work library by writing a VHDL representation of the package header into a source file. This representation needs to be accurate enough that later invocations of vhdlpp can read them with the VHDL parser.	2011-07-19 19:19:27 -07:00

Author

SHA1

Message

Date

Stephen Williams

148600814d

Handle std_logic_vector library output stream

When writing arrays to the work library, handle the special
case that it is an array of std_logic and write a std_logic_vector
declaration instead. This makes for a more compact description.

2011-07-23 10:44:36 -07:00

Stephen Williams

38854822da

Write package headers to a library file

Build up a work library by writing a VHDL representation of the
package header into a source file. This representation needs to
be accurate enough that later invocations of vhdlpp can read them
with the VHDL parser.

2011-07-19 19:19:27 -07:00

2 Commits