Currently the compiler coerces input ports to inout ports whenever
there is an internal driver connected to the internal port net.
This generates an error if the port is externally connected to
something other than a structural net. This patch modifies the
compiler to ensure port coercion only occurs in valid cases.
A valarray of an enum does not initialize to 0 so explicitly specify the
value to fill the array with. This was causing the compiler to incorrectly
report that fixed width elements in a concatenation had no size.
The following was done to remove compiler warning when using the native
compiler on OpenSolaris.
Remove the anonymous unions in tgt-vlog95/stmt.c and tgt-vvp/vvp_process.c.
Use UINT_MAX for the maximum unsigned unsigned instead of -1 in
tgt-vvp/draw_net_input.c.
Even though lex defines yywrap() to have no arguments when %option
noyywrp is used it generates a define that takes an argument that is not
used. The compiler warned about this so remove the option and add a
dummy yywrap function.
This patch covers more than it should. It removes many of the -Wextra
warnings in the main ivl directory. It also makes some minor code
improvements, adds support for constant logicals in eval_tree (&&/||),
adds support for correctly sign extending === and !==, it starts to
standardize the eval_tree debug messages and fixes a strength bug
in the target interface (found with -Wextra). The rest of the warnings
and eval_tree() rework will need to come as a second patch.
I'm adding more uses of the make_range_from_width function, so
it seems like time to get rid of its use of the svector template.
This thread led to a lot of other uses of svector that had to
also be removed.
Comparison expressions have sorta-self-determined arguments.
Handle the special cause that some of the arguments may be
themselves unsized, and so expecting to be even wider then
otherwise.
Operands to reduction unary operators are self determined, so
evaluate the operands that way. But this means that binary expressions
in this context should take pains to use their test_width tested
expression width.
This exposed a case where the test_width methods were not called
for self-determined expressions. Fix that too.
This is part of the 1800-2009 standard (Section 23.3.2.3) and allows
ports of module instances to be declared like:
modname instance(.foo, .bar);
instead of
modname instead(.foo(foo), .bar(bar));
The only tricky part about this is the implicit port connection shall
not create an implicit net declaration. To make this happen, the path
of least resistance was to add a bool to PEIdent indicating that it
should not implicitely create a net.
This does not rely on the generation flag to be 2009, following the
trend that new port naming convention (like ANSI style ports) work
regardless of the generation.
Creation of implicit nets requires knowledge of whether an identifier
has been declared before it is used. Currently implicit nets are
created during elaboration, but by this stage the order of declaration
and use is not known. This patch moves the creation of implicit nets
into the parser stage.
The power (**) and shift operators are different from other binary
operators because their expression width calculations rely only on
their left operand, with their right operand self-determined. Get
the handling of these operators out of the PEBinary base class to
prevent confusion.
This patch adds a number of compile and run-time checks for illegal
uses of variables declared in automatic tasks and functions. It
also adds a check for event expressions in automatic tasks that use
features not yet supported in VVP.
The arguments of logical and/or are self determined, and the width is
fixed as 1 bit. Account for this special behavior by creating the
PEBLogic class.
Later passes need the intermediate results for width and size so that
some special cases, were self-determined arguments occur, can be
processed properly during elaboration. This can be especially tricky
and interesting for ternary expressions.
This patch removes all the checks for constant expressions performed
during the parsing phase, as these checks are (mostly) repeated during
elaboration. It adds the missing check in the elaboration phase (the
RHS of a register initialisation), and improves the error reporting
and error recovery in other checks.
This patch fixes pr2132552, which was caused by a fault in the parser
constant expression checking.
This patch adds the constant system functions for Verilog-2005
and Verilog-AMS. These are evaluated at compile time. $abs(),
$min() and $max() support their polymorphic behavior in the
compiler where it really matters. They are always evaluated
as reals in the run time and the result/argument(s) will be
converted as needed.
The Verilog-2005 functions are available if using the 2005
generation (default) and if either the icarus-misc (also on
by default) or verilog-ams flags are set.
The Verilog-AMS functions are available if either the
icarus-misc or verilog-ams flags are set.
GCC 4.3 has tightened up header dependencies so that
`strcmp' is no longer declared if <cstdlib> is included
(which it was in prior versions). This causes the changes
in 5e512e6570 to fail to
build with 4.3.
This patch includes <cstring> in the files that are failing.
This patch adds the $clog2 system function. It also makes this
function work as a constant function. The runtime version still
needs to be updated to use an integer based version instead of
the current double based method. The double method suffers from
rounding errors.
Contribution statements have an l-value and r-value. Parse those
expressions into pform so that elaboration has something to work with.
In this process, this patch also changes the PECallFunction class to
use the vector template instead of the svector template. The latter
doesn't add anything over the STL vector template, so this is a start
of working the svector out.
If implicit nets are declared during elaboration, then the success
of binding during elaboration will depend on the order of the code
in the source file.
Rework the handling of file names to use a perm_string heap to hold
the file names, instead of the custom file name heap in the lexor.
Also rename the get_line to get_fileline to reflect its real duties.
This latter chage touched a lot of files.
pform and netlist for gates.
Change vvm constants to use the driver_t to drive
a constant value. This works better if there are
multiple drivers on a signal.
objects in the pform,
Handle named events within the mix of net events
and edges. As a unified lot they get caught together.
wait statements are broken into more complex statements
that include a conditional.
Do not generate NetPEvent or NetNEvent objects in
elaboration. NetEvent, NetEvWait and NetEvProbe
take over those functions in the netlist.
Martin Whitaker
Cary R
Stephen Williams
Jared Casper
Martin Whitaker
Nick Gasson
steve