Commit Graph

11 Commits

Author SHA1 Message Date
Stephen Williams 37ef14b1c8 Implement VHDL conf_std_logic_vector() as SystemVerilog size cast. 2011-10-29 14:47:39 -07:00
Stephen Williams d9acfe57b1 Put off array bound evaluation / describe entity generics as parameters
Entity generics are easily implemented as module parameters, so make
it so. Give the parameters their default values from the generic declaration.

Array bounds may use values that cannot be evaluated right away, so
put off their evaluation.
2011-10-15 17:41:48 -07:00
Stephen Williams f2629d53a2 Add VHDL support for named libraries
Named libraries are similar to the work library, but they are not
written to implicitly, or imported implicitly. They are only brought
in by a "library" clause, the the packages within the library are
brought in by a "use" clause.
2011-07-30 15:04:07 -07:00
Stephen Williams 9ee938f0b4 Replace package in work library when I get a new one. 2011-07-24 11:06:59 -07:00
Stephen Williams 116d9f5f54 Merge branch 'master' into work7 2011-07-24 11:06:22 -07:00
Pawel Szostek 46684bb28e Use dynamic allocation for VHDL global built-in types
Instead of using automatic variables for global
types, I allocate them dynamically. Thanks to it,
all type objects can be treated in the same way,
as all of them are pointers allocated with `new'.
Now we will be able to remove all scopes in the same
manner, no matter if it is a global or local scope,
by deleting all carried pointers.
2011-07-24 09:45:25 -07:00
Stephen Williams df8efed22b Parse work library for imported packages
When a "use" clause tries to pull a package from the work library,
put together a file name and try to find that package in the
work library directory. If found, parse the package file and
try again to find the package.
2011-07-23 10:07:20 -07:00
Stephen Williams 38854822da Write package headers to a library file
Build up a work library by writing a VHDL representation of the
package header into a source file. This representation needs to
be accurate enough that later invocations of vhdlpp can read them
with the VHDL parser.
2011-07-19 19:19:27 -07:00
Stephen Williams 3ff7a8f7b0 Add support for constants and package types.
Significant rework of scope management to unify the handling of
types in the ieee library and types/constants/components in packages.
This involved adjusting the parser rules to manage a stack of scopes
and rewriting the IEEE library support to not use global maps for
the loaded types.
2011-04-17 17:19:09 -07:00
Stephen Williams 303f057de1 Support collecting ALL component declarations from a used scope. 2011-04-13 19:55:18 -07:00
Stephen Williams d4c5cfc584 Add packages and component declarations within those packages.
This creates the Package class to represent packages, and the
Scope class to represent scopes in general. The library functions
are worked up to support scanning scopes for declarations that are
imported by "use" clauses.
2011-04-13 18:30:00 -07:00