Commit Graph

63 Commits

Author SHA1 Message Date
steve 90ae46476c Makefile patches to support target loading under cygwin. 2000-10-15 21:02:08 +00:00
steve 2dedd6c067 Scopes and processes are accessible randomly from
the design, and signals and logic are accessible
 from scopes. Remove the target calls that are no
 longer needed.

 Add the ivl_nexus_ptr_t and the means to get at
 them from nexus objects.

 Give names to methods that manipulate the ivl_design_t
 type more consistent names.
2000-10-15 04:46:23 +00:00
steve 8fe887ffe1 Back pointers in the nexus objects into the devices
that point to it.

 Collect threads into a list in the design.
2000-10-08 04:01:54 +00:00
steve 76e2c509d7 Put logic devices into scopes. 2000-10-07 19:45:42 +00:00
steve 6f69773c57 ivl_target updates, including more complete
handling of ivl_nexus_t objects. Much reduced
 dependencies on pointers to netlist objects.
2000-10-06 23:46:50 +00:00
steve 41f3ba65a1 xor and constant devices. 2000-10-05 05:03:01 +00:00
steve 9680de25cd Fix the clean target and excess dependencies. 2000-10-04 17:08:31 +00:00
steve 07aa86f0fa print reg signals. 2000-10-04 02:24:20 +00:00
steve c12e0f5416 ivl_expr_t support for binary operators,
Create a proper ivl_scope_t object.
2000-09-30 02:18:15 +00:00
steve d6b43519a8 Add EX_NUMBER and ST_TRIGGER to dll-api. 2000-09-26 00:30:07 +00:00
steve e8bb53e2ea API access to signal type and port type. 2000-09-24 15:46:00 +00:00
steve 36cc374ec9 Add support for signal expressions. 2000-09-24 02:21:53 +00:00
steve 80c69d565b Add enough tgt-verilog code to support hello world. 2000-09-23 05:15:07 +00:00