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API access to signal type and port type.

This commit is contained in:
steve 2000-09-24 15:46:00 +00:00
parent 2be1c115ff
commit e8bb53e2ea
5 changed files with 165 additions and 17 deletions
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55
ivl_target.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: ivl_target.h,v 1.11 2000/09/24 02:21:53 steve Exp $"
#ident "$Id: ivl_target.h,v 1.12 2000/09/24 15:46:00 steve Exp $"
#endif
#ifdef __cplusplus
@ -64,10 +64,10 @@ typedef struct ivl_net_const_s*ivl_net_const_t;
typedef struct ivl_net_event_s*ivl_net_event_t;
typedef struct ivl_net_logic_s*ivl_net_logic_t;
typedef struct ivl_net_probe_s*ivl_net_probe_t;
typedef struct ivl_net_signal_s*ivl_net_signal_t;
typedef struct ivl_nexus_s *ivl_nexus_t;
typedef struct ivl_process_s *ivl_process_t;
typedef struct ivl_scope_s *ivl_scope_t;
typedef struct ivl_signal_s *ivl_signal_t;
typedef struct ivl_statement_s*ivl_statement_t;
/*
@ -76,6 +76,7 @@ typedef struct ivl_statement_s*ivl_statement_t;
* changes and additions to the enumerations.
*/
/* This is the type of an ivl_expr_t object. */
typedef enum ivl_expr_type_e {
IVL_EX_NONE = 0,
IVL_EX_NUMBER,
@ -84,6 +85,7 @@ typedef enum ivl_expr_type_e {
IVL_EX_SUBSIG,
} ivl_expr_type_t;
/* This is the type code for an ivl_net_logic_t object. */
typedef enum ivl_logic_e {
IVL_LO_NONE = 0,
IVL_LO_AND,
@ -100,11 +102,41 @@ typedef enum ivl_logic_e {
IVL_LO_XOR
} ivl_logic_t;
/* Processes are initial or always blocks with a statement. This is
the type of the ivl_process_t object. */
typedef enum ivl_process_type_e {
IVL_PR_INITIAL = 0,
IVL_PR_ALWAYS = 1
} ivl_process_type_t;
/* Signals (ivl_signal_t) that are ports into the scope that contains
them have a port type. Otherwise, they are port IVL_SIP_NONE. */
typedef enum ivl_signal_port_e {
IVL_SIP_NONE = 0,
IVL_SIP_INPUT = 1,
IVL_SIP_OUTPUT= 2,
IVL_SIP_INOUT = 3
} ivl_signal_port_t;
/* This is the type code for an ivl_signal_t object. Implicit types
are resolved by the core compiler, and integers are converted into
signed registers. */
typedef enum ivl_signal_type_e {
IVL_SIT_NONE = 0,
IVL_SIT_REG,
IVL_SIT_SUPPLY0,
IVL_SIT_SUPPLY1,
IVL_SIT_TRI,
IVL_SIT_TRI0,
IVL_SIT_TRI1,
IVL_SIT_TRIAND,
IVL_SIT_TRIOR,
IVL_SIT_WAND,
IVL_SIT_WIRE,
IVL_SIT_WOR
} ivl_signal_type_t;
/* This is the type code for ivl_statement_t objects. */
typedef enum ivl_statement_type_e {
IVL_ST_NONE = 0,
IVL_ST_NOOP = 1,
@ -164,8 +196,18 @@ extern unsigned ivl_get_logic_pins(ivl_net_logic_t net);
extern const char* ivl_get_nexus_name(ivl_nexus_t net);
extern unsigned ivl_get_signal_pins(ivl_net_signal_t net);
/* SIGNALS
* Signals are named things in the Verilog source, like wires and
* regs, and also named things that are preated as temporaries during
* certain elaboration or optimization steps. A signal may also be a
* port of a module or task.
*
* Signals have a name (obviously) and types. A signal may also be
* signed or unsigned.
*/
extern unsigned ivl_signal_pins(ivl_signal_t net);
extern ivl_signal_port_t ivl_signal_port(ivl_signal_t net);
extern ivl_signal_type_t ivl_signal_type(ivl_signal_t net);
/*
* These functions get information about a process. A process is
@ -297,7 +339,7 @@ typedef int (*net_probe_f)(const char*name, ivl_net_probe_t net);
Signals are things like "wire foo" or "reg bar;" that is, declared
signals in the verilog source. These are not memories, which are
handled elsewhere. */
typedef int (*net_signal_f)(const char*name, ivl_net_signal_t net);
typedef int (*net_signal_f)(const char*name, ivl_signal_t net);
/* target_process
@ -327,6 +369,9 @@ _END_DECL
/*
* $Log: ivl_target.h,v $
* Revision 1.12 2000/09/24 15:46:00 steve
* API access to signal type and port type.
*
* Revision 1.11 2000/09/24 02:21:53 steve
* Add support for signal expressions.
*

70
t-dll-api.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: t-dll-api.cc,v 1.5 2000/09/24 02:21:53 steve Exp $"
#ident "$Id: t-dll-api.cc,v 1.6 2000/09/24 15:46:00 steve Exp $"
#endif
# include "t-dll.h"
@ -97,12 +97,75 @@ extern "C" ivl_statement_t ivl_get_process_stmt(ivl_process_t net)
return net->stmt_;
}
extern "C" unsigned ivl_get_signal_pins(ivl_net_signal_t net)
extern "C" unsigned ivl_signal_pins(ivl_signal_t net)
{
const NetNet*sig = (const NetNet*)net;
return sig->pin_count();
}
extern "C" ivl_signal_port_t ivl_signal_port(ivl_signal_t net)
{
const NetNet*sig = (const NetNet*)net;
switch (sig->port_type()) {
case NetNet::PINPUT:
return IVL_SIP_INPUT;
case NetNet::POUTPUT:
return IVL_SIP_OUTPUT;
case NetNet::PINOUT:
return IVL_SIP_INOUT;
}
return IVL_SIP_NONE;
}
extern "C" ivl_signal_type_t ivl_signal_type(ivl_signal_t net)
{
const NetNet*sig = (const NetNet*)net;
switch (sig->type()) {
case NetNet::REG:
case NetNet::INTEGER:
return IVL_SIT_REG;
case NetNet::SUPPLY0:
return IVL_SIT_SUPPLY0;
case NetNet::SUPPLY1:
return IVL_SIT_SUPPLY1;
case NetNet::TRI:
return IVL_SIT_TRI;
case NetNet::TRI0:
return IVL_SIT_TRI0;
case NetNet::TRI1:
return IVL_SIT_TRI1;
case NetNet::TRIAND:
return IVL_SIT_TRIAND;
case NetNet::TRIOR:
return IVL_SIT_TRIOR;
case NetNet::WAND:
return IVL_SIT_WAND;
case NetNet::WIRE:
case NetNet::IMPLICIT:
return IVL_SIT_WIRE;
case NetNet::WOR:
return IVL_SIT_WOR;
}
return IVL_SIT_NONE;
}
extern "C" ivl_statement_type_t ivl_statement_type(ivl_statement_t net)
{
return net->type_;
@ -200,6 +263,9 @@ extern "C" ivl_statement_t ivl_stmt_sub_stmt(ivl_statement_t net)
/*
* $Log: t-dll-api.cc,v $
* Revision 1.6 2000/09/24 15:46:00 steve
* API access to signal type and port type.
*
* Revision 1.5 2000/09/24 02:21:53 steve
* Add support for signal expressions.
*

7
t-dll.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: t-dll.cc,v 1.7 2000/09/18 01:24:32 steve Exp $"
#ident "$Id: t-dll.cc,v 1.8 2000/09/24 15:46:00 steve Exp $"
#endif
# include "compiler.h"
@ -148,7 +148,7 @@ void dll_target::scope(const NetScope*net)
void dll_target::signal(const NetNet*net)
{
if (net_signal_) {
int rc = (net_signal_)(net->name(), (ivl_net_signal_t)net);
int rc = (net_signal_)(net->name(), (ivl_signal_t)net);
return;
} else {
@ -163,6 +163,9 @@ extern const struct target tgt_dll = { "dll", &dll_target_obj };
/*
* $Log: t-dll.cc,v $
* Revision 1.8 2000/09/24 15:46:00 steve
* API access to signal type and port type.
*
* Revision 1.7 2000/09/18 01:24:32 steve
* Get the structure for ivl_statement_t worked out.
*

41
tgt-stub/stub.c
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: stub.c,v 1.10 2000/09/24 02:21:53 steve Exp $"
#ident "$Id: stub.c,v 1.11 2000/09/24 15:46:00 steve Exp $"
#endif
/*
@ -45,13 +45,12 @@ int target_start_design(ivl_design_t des)
return -2;
}
fprintf(out, "module %s;\n", ivl_get_root_name(des));
fprintf(out, "STUB: root module = %s;\n", ivl_get_root_name(des));
return 0;
}
void target_end_design(ivl_design_t des)
{
fprintf(out, "endmodule\n");
fclose(out);
}
@ -107,9 +106,38 @@ int target_net_probe(const char*name, ivl_net_probe_t net)
return 0;
}
int target_net_signal(const char*name, ivl_net_signal_t net)
int target_net_signal(const char*name, ivl_signal_t net)
{
fprintf(out, "STUB: %s: signal [%u]\n", name, ivl_get_signal_pins(net));
const char*type = "?";
const char*port = "";
switch (ivl_signal_type(net)) {
case IVL_SIT_REG:
type = "reg";
break;
case IVL_SIT_WIRE:
type = "wire";
break;
}
switch (ivl_signal_port(net)) {
case IVL_SIP_INPUT:
port = "input ";
break;
case IVL_SIP_OUTPUT:
port = "output ";
break;
case IVL_SIP_INOUT:
port = "inout ";
break;
}
fprintf(out, "STUB: %s %s[%u] %s\n", type, port,
ivl_signal_pins(net), name);
return 0;
}
@ -219,6 +247,9 @@ int target_process(ivl_process_t net)
/*
* $Log: stub.c,v $
* Revision 1.11 2000/09/24 15:46:00 steve
* API access to signal type and port type.
*
* Revision 1.10 2000/09/24 02:21:53 steve
* Add support for signal expressions.
*

9
tgt-verilog/verilog.c
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: verilog.c,v 1.2 2000/09/24 02:21:54 steve Exp $"
#ident "$Id: verilog.c,v 1.3 2000/09/24 15:46:00 steve Exp $"
#endif
/*
@ -107,9 +107,9 @@ int target_net_probe(const char*name, ivl_net_probe_t net)
return 0;
}
int target_net_signal(const char*name, ivl_net_signal_t net)
int target_net_signal(const char*name, ivl_signal_t net)
{
fprintf(out, "STUB: %s: signal [%u]\n", name, ivl_get_signal_pins(net));
fprintf(out, "STUB: %s: signal [%u]\n", name, ivl_signal_pins(net));
return 0;
}
@ -230,6 +230,9 @@ int target_process(ivl_process_t net)
/*
* $Log: verilog.c,v $
* Revision 1.3 2000/09/24 15:46:00 steve
* API access to signal type and port type.
*
* Revision 1.2 2000/09/24 02:21:54 steve
* Add support for signal expressions.
*