Several places in Icarus Verilog try to get the bits of the integer
part of a double by casting to unsigned or unsigned long. But that
causes some compilers to generate smart code that converts all values
less then 0 to 0, even though we are after the bits, not the math
value. So be careful to do this cast only to non-negative values and
uminus the bits if necessary to get exactly what we want.
Signed-off-by: Stephen Williams <steve@icarus.com>
This patch implements the System Verilog $urandom() and $urandom_range()
functions. There are no check to verify that $urandom_range is only given
unsigned arguments. If you give it a negative value the bit pattern will
be interpreted as a unsigned number.
The standard states that the seed for the random functions should be
an integer/time variable or a register. This patch fixes the compiletf
routines to check for this. There is also a small patch to
vvp/vpi_signal.cc that removes an assert that was failing and replaces
it with appropriate code. The assert was verifying that the source was
not bigger than an integer. The problem with this is that a time
variable or register may be bigger than an integer. I altered the code
to remove the assert and copy only the lower (8 * sizeof integer) bits.
The potential overflow/loss of precision is not checked. This passes
the regression tests.
Add the missing probabilistic functions and add compiletf routines
for all the functions. The original calltf routines have been
modified as appropriate. The base functions are straight copies
from the standard. I have visually verified the curves with 5,000
points and they look correct.
Larry Doolittle
Stephen Williams
Cary R
steve