diff --git a/ivtest/ivltests/module_port_shortreal.v b/ivtest/ivltests/module_port_shortreal.v
new file mode 100644
index 000000000..7b89c07d9
--- /dev/null
+++ b/ivtest/ivltests/module_port_shortreal.v
@@ -0,0 +1,30 @@
+// Check that shortreal module ports are supported
+
+module M (
+  input shortreal in,
+  output shortreal out
+);
+
+  assign out = in * 10.1;
+
+endmodule
+
+module test;
+
+  shortreal r;
+
+  M m (
+    .in (1.23),
+    .out (r)
+  );
+
+  initial begin
+    #1
+    if (r == 12.423) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule
diff --git a/ivtest/regress-ivl1.list b/ivtest/regress-ivl1.list
index bf2394966..649d38043 100644
--- a/ivtest/regress-ivl1.list
+++ b/ivtest/regress-ivl1.list
@@ -225,6 +225,7 @@ ca_var_delay		normal			ivltests
 cast_real_signed	normal			ivltests
 cast_real_unsigned	normal			ivltests
 delayed_sfunc		normal,-gspecify	ivltests gold=delayed_sfunc.gold
+module_port_shortreal	normal,-g2005-sv	ivltests # shortreal
 pr1861212c		normal			ivltests gold=pr1861212.gold
 pr1864110a		normal			ivltests gold=pr1864110a.gold
 pr1864110b		normal			ivltests gold=pr1864110b.gold
diff --git a/ivtest/regress-vlog95.list b/ivtest/regress-vlog95.list
index c85adc362..fde9fadc1 100644
--- a/ivtest/regress-vlog95.list
+++ b/ivtest/regress-vlog95.list
@@ -134,6 +134,7 @@ implicit_cast5		CE,-g2009,-pallowsigned=1	ivltests
 implicit_cast6		CE,-g2009,-pallowsigned=1	ivltests
 implicit_cast12		CE,-g2009,-pallowsigned=1	ivltests
 implicit_cast13		CE,-g2009,-pallowsigned=1	ivltests
+module_port_shortreal	CE,-g2005-sv		ivltests
 pr1861212c		CE			ivltests
 pr1864110a		CE			ivltests
 pr1864110b		CE			ivltests