Some minor cleanup found with the latest cppcheck
Remove an unused variable (desired_vector_width) in elaborate.cc. Reduce the scope of spin to make it obvious it is only used locally in elaborate.cc. Initialize sel_type_ in the NetAssign_ constructor (net_assign.cc). The code doesn't currently require this since sel_type_ is only used when the base is not zero and it is always defined when base is not zero, but giving this a default value in the constructor hedges against accidentally using an undefined value if someone checks the select type when the base is zero.
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11
elaborate.cc
11
elaborate.cc
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@ -1366,10 +1366,6 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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// even multiple of the instance count.
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// even multiple of the instance count.
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assert(prts_vector_width % instance.size() == 0);
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assert(prts_vector_width % instance.size() == 0);
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unsigned desired_vector_width = prts_vector_width;
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if (instance.size() != 1)
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desired_vector_width = 0;
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if (!prts.empty() && (prts[0]->port_type() == NetNet::PINPUT)
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if (!prts.empty() && (prts[0]->port_type() == NetNet::PINPUT)
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&& prts[0]->pin(0).nexus()->drivers_present()
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&& prts[0]->pin(0).nexus()->drivers_present()
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&& pins[idx]->is_collapsible_net(des, scope)) {
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&& pins[idx]->is_collapsible_net(des, scope)) {
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@ -1705,7 +1701,6 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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// an array of signals to be connected to the sig.
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// an array of signals to be connected to the sig.
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NetConcat*ctmp;
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NetConcat*ctmp;
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unsigned spin = 0;
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if (prts.size() == 1) {
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if (prts.size() == 1) {
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@ -1755,7 +1750,8 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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<< (idx+1) << "." << endl;
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<< (idx+1) << "." << endl;
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}
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}
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for (unsigned ldx = 0 ; ldx < prts.size() ; ldx += 1) {
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for (unsigned ldx = 0, spin = 0 ;
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ldx < prts.size() ; ldx += 1) {
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NetNet*sp = prts[prts.size()-ldx-1];
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NetNet*sp = prts[prts.size()-ldx-1];
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NetPartSelect*ptmp = new NetPartSelect(sig, spin,
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NetPartSelect*ptmp = new NetPartSelect(sig, spin,
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sp->vector_width(),
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sp->vector_width(),
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@ -1768,7 +1764,8 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
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break;
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break;
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case NetNet::PINOUT:
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case NetNet::PINOUT:
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for (unsigned ldx = 0 ; ldx < prts.size() ; ldx += 1) {
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for (unsigned ldx = 0, spin = 0 ;
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ldx < prts.size() ; ldx += 1) {
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NetNet*sp = prts[prts.size()-ldx-1];
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NetNet*sp = prts[prts.size()-ldx-1];
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NetTran*ttmp = new NetTran(scope,
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NetTran*ttmp = new NetTran(scope,
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scope->local_symbol(),
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scope->local_symbol(),
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2000-2011 Stephen Williams (steve@icarus.com)
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*
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*
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* This source code is free software; you can redistribute it
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* and/or modify it in source code form under the terms of the GNU
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@ -36,7 +36,7 @@ unsigned count_lval_width(const NetAssign_*idx)
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}
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}
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NetAssign_::NetAssign_(NetNet*s)
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NetAssign_::NetAssign_(NetNet*s)
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: sig_(s), word_(0), base_(0)
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: sig_(s), word_(0), base_(0), sel_type_(IVL_SEL_OTHER)
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{
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{
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lwid_ = sig_->vector_width();
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lwid_ = sig_->vector_width();
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sig_->incr_lref();
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sig_->incr_lref();
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