diff --git a/elaborate.cc b/elaborate.cc
index b5ba65c0f..59c39d7af 100644
--- a/elaborate.cc
+++ b/elaborate.cc
@@ -1366,10 +1366,6 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
 	      // even multiple of the instance count.
 	    assert(prts_vector_width % instance.size() == 0);
 
-	    unsigned desired_vector_width = prts_vector_width;
-	    if (instance.size() != 1)
-		  desired_vector_width = 0;
-
 	    if (!prts.empty() && (prts[0]->port_type() == NetNet::PINPUT)
                 && prts[0]->pin(0).nexus()->drivers_present()
                 && pins[idx]->is_collapsible_net(des, scope)) {
@@ -1705,7 +1701,6 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
 	      // an array of signals to be connected to the sig.
 
 	    NetConcat*ctmp;
-	    unsigned spin = 0;
 
 	    if (prts.size() == 1) {
 
@@ -1755,7 +1750,8 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
 			     << (idx+1) << "." << endl;
 		  }
 
-		  for (unsigned ldx = 0 ;  ldx < prts.size() ;  ldx += 1) {
+		  for (unsigned ldx = 0, spin = 0 ;
+		       ldx < prts.size() ;  ldx += 1) {
 			NetNet*sp = prts[prts.size()-ldx-1];
 			NetPartSelect*ptmp = new NetPartSelect(sig, spin,
 							   sp->vector_width(),
@@ -1768,7 +1764,8 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
 		  break;
 
 		case NetNet::PINOUT:
-		  for (unsigned ldx = 0 ;  ldx < prts.size() ;  ldx += 1) {
+		  for (unsigned ldx = 0, spin = 0 ;
+		       ldx < prts.size() ;  ldx += 1) {
 			NetNet*sp = prts[prts.size()-ldx-1];
 			NetTran*ttmp = new NetTran(scope,
 			                           scope->local_symbol(),
diff --git a/net_assign.cc b/net_assign.cc
index 0ea1a2b2e..f12bf64b2 100644
--- a/net_assign.cc
+++ b/net_assign.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2011 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -36,7 +36,7 @@ unsigned count_lval_width(const NetAssign_*idx)
 }
 
 NetAssign_::NetAssign_(NetNet*s)
-: sig_(s), word_(0), base_(0)
+: sig_(s), word_(0), base_(0), sel_type_(IVL_SEL_OTHER)
 {
       lwid_ = sig_->vector_width();
       sig_->incr_lref();