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Update header files to use a more standard name to prevent rereading This is from github report #16. There are likely a few more issues that need to be addressed though this takes care of the major ones.
2014-07-23 22:39:29 +02:00
#ifndef IVL_PExpr_H
#define IVL_PExpr_H
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
/*
Check what can drive a variable in SystemVerilog
2025-07-01 08:47:38 +02:00
* Copyright (c) 1998-2025 Stephen Williams <steve@icarus.com>
Add packages and their own scope. This makes <pkg>::<name> work properly, and also makes the package descriptions available through VPI.
2013-02-17 23:42:07 +01:00
* Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
updated FSF-address
2012-08-29 03:41:23 +02:00
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
*/
# include <string>
Allow part selects of memory words in l-values.
2006-02-02 03:43:57 +01:00
# include <vector>
Elaborate concatenation expression put tested widths to use. Concatenation expressions need to use the tested widths of its argument expressions during elaboration.
2008-11-19 01:52:05 +01:00
# include <valarray>
Add support for SystemVerilog sign cast SystemVerilog supports sign cast where it is possible to change the signedness of an expression. Syntactical it is similar to width or type casting, except that the keywords 'signed' or 'unsigned' are used in front of the cast operator. E.g. ``` logic [3:0] a = 4'b1000; logic [7:0] b = signed'(a); // b is 8'b11111000; logic signed [3:0] c = 4'b1000; logic signed [7:0] d = unsigned'(c); // d is 8'b00001000; ``` As noted by the LRM section 6.24.1 ("Cast operator") applying a sign cast to an expression is equivalent to calling the $signed() and $unsigned() system functions on the expression. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2020-10-04 17:49:23 +02:00
# include <memory>
Parse OR of event expressions.
1999-04-29 04:16:26 +02:00
# include "netlist.h"
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
# include "verinum.h"
Add memories to the parse and elaboration phases.
1999-04-19 03:59:36 +02:00
# include "LineInfo.h"
Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
# include "pform_types.h"
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
class Design;
Redo constant expression detection to happen after parsing. Parse more operators and expressions.
1999-05-16 07:08:42 +02:00
class Module;
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
class LexicalScope;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
class NetNet;
class NetExpr;
Redesign the implementation of scopes and parameters. I now generate the scopes and notice the parameters in a separate pass over the pform. Once the scopes are generated, I can process overrides and evalutate paremeters before elaboration begins.
2000-03-08 05:36:53 +01:00
class NetScope;
Add packages and their own scope. This makes <pkg>::<name> work properly, and also makes the package descriptions available through VPI.
2013-02-17 23:42:07 +01:00
class PPackage;
Rework symbol_search function. There are too many ad hoc handlers of symbol_search partial results. Rewrite symbol_search to clean up things like partial results and member/method detections. Use this reworked symbol_search function to rewrite expression elaborate for the PECallFunction expressions.
2020-12-31 22:04:56 +01:00
struct symbol_search_results;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
/*
* The PExpr class hierarchy supports the description of
* expressions. The parser can generate expression objects from the
* source, possibly reducing things that it knows how to reduce.
*/
Add memories to the parse and elaboration phases.
1999-04-19 03:59:36 +02:00
class PExpr : public LineInfo {
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
public:
Improvements to strict-expr-width mode. Enable error reporting when an unsized number is used in a concatenation operand. Allow greater pruning of expressions containing unsized numbers.
2013-10-28 23:07:09 +01:00
// Mode values used by test_width() (see below for description).
enum width_mode_t { SIZED, UNSIZED, EXPAND, LOSSLESS, UPSIZE };
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
Improvements to strict-expr-width mode. Enable error reporting when an unsized number is used in a concatenation operand. Allow greater pruning of expressions containing unsized numbers.
2013-10-28 23:07:09 +01:00
// Flag values that can be passed to elaborate_expr().
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
static const unsigned NO_FLAGS = 0x0;
static const unsigned NEED_CONST = 0x1;
static const unsigned SYS_TASK_ARG = 0x2;
Allow specparam declarations outside specify blocks. This patch extends the compiler to support all specparam declarations allowed by the 1364-2005 standard. For compatibility with other simulators, it allows specparam values to be used in any constant expression, but outputs a warning message and disables run-time annotation of a specparam if it is used in an expression that must be evaluated at compile time.
2012-05-07 00:11:26 +02:00
static const unsigned ANNOTATABLE = 0x4;
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
Fix type/width for case and case item expressions. The compiler was treating case and case item expressions as self-determined. They should be context-sensitive, just like the operands of a comparison operation.
2013-04-07 13:23:45 +02:00
// Convert width mode to human-readable form.
static const char*width_mode_name(width_mode_t mode);
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
PExpr();
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual ~PExpr() override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Remove "using namespace std" from compiler header files and fix the fallout.
2021-11-04 17:12:04 +01:00
virtual void dump(std::ostream&) const;
separate assign lval elaboration for error checking.
1999-09-15 06:17:52 +02:00
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
// This method tests whether the expression contains any identifiers
// that have not been previously declared in the specified scope or
// in any containing scope. Any such identifiers are added to the
// specified scope as scalar nets of the specified type.
//
// This operation must be performed by the parser, to ensure that
// subsequent declarations do not affect the decision to create an
// implicit net.
virtual void declare_implicit_nets(LexicalScope*scope, NetNet::Type type);
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
// This method tests whether the expression contains any
// references to automatically allocated variables.
virtual bool has_aa_term(Design*des, NetScope*scope) const;
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// This method tests the type and width that the expression wants
// to be. It should be called before elaborating an expression to
// figure out the type and width of the expression. It also figures
// out the minimum width that can be used to evaluate the expression
// without changing the result. This allows the expression width to
// be pruned when not all bits of the result are used.
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
//
More spelling fixes Mostly comments Changs "initilzers" in a string visible with debug_elaborate. Includes a few British->American changes in the root directory only.
2014-01-31 01:16:19 +01:00
// Normally mode should be initialized to SIZED before starting to
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// test the width of an expression. In SIZED mode the expression
// width will be calculated strictly according to the IEEE standard
// rules for expression width.
Improvements to strict-expr-width mode. Enable error reporting when an unsized number is used in a concatenation operand. Allow greater pruning of expressions containing unsized numbers.
2013-10-28 23:07:09 +01:00
//
// If the expression is found to contain an unsized literal number
// and gn_strict_expr_width_flag is set, mode will be changed to
// UNSIZED. In UNSIZED mode the expression width will be calculated
// exactly as in SIZED mode - the change in mode simply flags that
// the expression contains an unsized numbers.
//
// If the expression is found to contain an unsized literal number
// and gn_strict_expr_width_flag is not set, mode will be changed
// to LOSSLESS. In LOSSLESS mode the expression width will be
// calculated as the minimum width necessary to avoid arithmetic
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// overflow or underflow.
Improvements to strict-expr-width mode. Enable error reporting when an unsized number is used in a concatenation operand. Allow greater pruning of expressions containing unsized numbers.
2013-10-28 23:07:09 +01:00
//
// Once in LOSSLESS mode, if the expression is found to contain
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// an operation that coerces a vector operand to a different type
Improvements to strict-expr-width mode. Enable error reporting when an unsized number is used in a concatenation operand. Allow greater pruning of expressions containing unsized numbers.
2013-10-28 23:07:09 +01:00
// (signed <-> unsigned), mode will be changed to UPSIZE. UPSIZE
// mode is the same as LOSSLESS, except that the final expression
// width will be forced to be at least integer_width. This is
// necessary to ensure compatibility with the IEEE standard, which
// requires unsized numbers to be treated as having the same width
// as an integer. The lossless width calculation is inadequate in
// this case because coercing an operand to a different type means
// that the expression no longer obeys the normal rules of arithmetic.
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
//
More spelling fixes Mostly comments Changs "initilzers" in a string visible with debug_elaborate. Includes a few British->American changes in the root directory only.
2014-01-31 01:16:19 +01:00
// If mode is initialized to EXPAND instead of SIZED, the expression
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// width will be calculated as the minimum width necessary to avoid
// arithmetic overflow or underflow, even if it contains no unsized
Improvements to strict-expr-width mode. Enable error reporting when an unsized number is used in a concatenation operand. Allow greater pruning of expressions containing unsized numbers.
2013-10-28 23:07:09 +01:00
// literals. mode will be changed LOSSLESS or UPSIZE as described
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// above. This supports a non-standard mode of expression width
// calculation.
Include a calculation of the expression type in test_width methods. The type of the sub-expression is sometimes needed by clients of the test_width methods, so add that as an output.
2008-09-27 07:20:11 +02:00
//
Improvements to strict-expr-width mode. Enable error reporting when an unsized number is used in a concatenation operand. Allow greater pruning of expressions containing unsized numbers.
2013-10-28 23:07:09 +01:00
// When the final value of mode is UPSIZE, the width returned by
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// this method is the calculated lossless width, but the width
// returned by a subsequent call to the expr_width method will be
// the final expression width.
Fix spacing problems. This patch fixes spacing problems in the source code, space/tab at the end of line and space before tab.
2011-03-03 05:23:02 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
width_mode_t&mode);
The test_width methods scan and mark expressions with type and size. Later passes need the intermediate results for width and size so that some special cases, were self-determined arguments occur, can be processed properly during elaboration. This can be especially tricky and interesting for ternary expressions.
2008-10-11 05:42:07 +02:00
// After the test_width method is complete, these methods
// return valid results.
ivl_variable_type_t expr_type() const { return expr_type_; }
unsigned expr_width() const { return expr_width_; }
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned min_width() const { return min_width_; }
bool has_sign() const { return signed_flag_; }
// This method allows the expression type (signed/unsigned)
// to be propagated down to any context-dependant operands.
void cast_signed(bool flag) { signed_flag_ = flag; }
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
Get some type information to the "new" expression for darrays.
2012-10-01 03:03:10 +02:00
// This is the more generic form of the elaborate_expr method
// below. The plan is to replace the simpler elaborate_expr
// method with this version, which can handle more advanced
// types. But for now, this is only implemented in special cases.
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
ivl_type_t type, unsigned flags) const;
Make elaborate_expr methods aware of the width that the context requires of it. In the process, fix sizing of the width of unary minus is context determined sizes.
2006-06-02 06:48:49 +02:00
// Procedural elaboration of the expression. The expr_width is
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
// the required width of the expression.
Evaluate parameter expressions losslessly Make sure parameter expressions are evaluated losslessly, as if the l-value is unsigned and thus virtually infinite.
2007-06-28 07:05:36 +02:00
//
// The sys_task_arg flag is true if expressions are allowed to
// be incomplete.
Detect missing indices to memories (PR#421)
2002-04-13 04:33:17 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
unsigned flags) const;
Redesign the implementation of scopes and parameters. I now generate the scopes and notice the parameters in a separate pass over the pform. Once the scopes are generated, I can process overrides and evalutate paremeters before elaboration begins.
2000-03-08 05:36:53 +01:00
separate assign lval elaboration for error checking.
1999-09-15 06:17:52 +02:00
// This method elaborates the expression as gates, but
// restricted for use as l-values of continuous assignments.
Check what can drive a variable in SystemVerilog
2025-07-01 08:47:38 +02:00
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
bool var_allowed_in_sv) const;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Implement bi-directional part selects.
2005-08-06 19:58:16 +02:00
// This is similar to elaborate_lnet, except that the
// expression is evaluated to be bi-directional. This is
// useful for arguments to inout ports of module instances and
// ports of tran primitives.
Check what can drive a variable in SystemVerilog
2025-07-01 08:47:38 +02:00
virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope,
bool var_allowed_in_sv) const;
Implement bi-directional part selects.
2005-08-06 19:58:16 +02:00
move lval elaboration to PExpr virtual methods.
2000-09-09 17:21:26 +02:00
// Expressions that can be in the l-value of procedural
Unify elaboration of l-values for all proceedural assignments, including assing, cassign and force. Generate NetConcat devices for gate outputs that feed into a vector results. Use this to hande gate arrays. Also let gate arrays handle vectors of gates when the outputs allow for it.
2004-12-30 00:55:43 +01:00
// assignments can be elaborated with this method. If the
Handle out-of range and undefined LHS word indices in assignments. For constant word indices, issue a warning if the index is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-18 20:21:37 +02:00
// is_cassign or is_force flags are true, then the set of
// valid l-value types is slightly modified to accommodate
// the Verilog procedural continuous assignment statements.
Unify elaboration of l-values for all proceedural assignments, including assing, cassign and force. Generate NetConcat devices for gate outputs that feed into a vector results. Use this to hande gate arrays. Also let gate arrays handle vectors of gates when the outputs allow for it.
2004-12-30 00:55:43 +01:00
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
Handle out-of range and undefined LHS word indices in assignments. For constant word indices, issue a warning if the index is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-18 20:21:37 +02:00
bool is_cassign,
Add support for `const` variables SystemVerilog allows to declare const variables. These variables are read-only and can not be assigned a value after their declaration. It is only possible to assign an initial value as an initializer. E.g. ``` const int x = 10; x = 20; // Error ``` The LRM requires that for variable declarations with static storage the initializer is a constant expression with the extension that other const variables are also allowed. const variables with automatic storage can be initialized by any expression. Checking if an expression contains only const variables requires a bit more work to implement. So for now be more lenient that what the standard requires and allow arbitrary expressions to initialize const variables even for those with static storage. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-01-03 21:24:23 +01:00
bool is_force,
bool is_init = false) const;
move lval elaboration to PExpr virtual methods.
2000-09-09 17:21:26 +02:00
Fix for pr3194155. Currently the compiler coerces input ports to inout ports whenever there is an internal driver connected to the internal port net. This generates an error if the port is externally connected to something other than a structural net. This patch modifies the compiler to ensure port coercion only occurs in valid cases.
2011-03-13 14:29:42 +01:00
// This method returns true if the expression represents a
// structural net that can have multiple drivers. This is
// used to test whether an input port connection can be
// collapsed to a single wire.
An input port driven by a variable is not collapsible
2020-12-01 07:44:54 +01:00
virtual bool is_collapsible_net(Design*des, NetScope*scope,
NetNet::PortType port_type) const;
Fix for pr3194155. Currently the compiler coerces input ports to inout ports whenever there is an internal driver connected to the internal port net. This generates an error if the port is externally connected to something other than a structural net. This patch modifies the compiler to ensure port coercion only occurs in valid cases.
2011-03-13 14:29:42 +01:00
The test_width methods scan and mark expressions with type and size. Later passes need the intermediate results for width and size so that some special cases, were self-determined arguments occur, can be processed properly during elaboration. This can be especially tricky and interesting for ternary expressions.
2008-10-11 05:42:07 +02:00
protected:
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned fix_width_(width_mode_t mode);
The test_width methods scan and mark expressions with type and size. Later passes need the intermediate results for width and size so that some special cases, were self-determined arguments occur, can be processed properly during elaboration. This can be especially tricky and interesting for ternary expressions.
2008-10-11 05:42:07 +02:00
// The derived class test_width methods should fill these in.
ivl_variable_type_t expr_type_;
unsigned expr_width_;
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned min_width_;
bool signed_flag_;
The test_width methods scan and mark expressions with type and size. Later passes need the intermediate results for width and size so that some special cases, were self-determined arguments occur, can be processed properly during elaboration. This can be especially tricky and interesting for ternary expressions.
2008-10-11 05:42:07 +02:00
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
private: // not implemented
PExpr(const PExpr&);
PExpr& operator= (const PExpr&);
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
};
Remove "using namespace std" from compiler header files and fix the fallout.
2021-11-04 17:12:04 +01:00
std::ostream& operator << (std::ostream&, const PExpr&);
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Handle array assignment patters through pform. This gets us to elaboration. In the process also fix up ivl_type_t type comparisons to do deep type comparison.
2013-09-29 23:48:42 +02:00
class PEAssignPattern : public PExpr {
public:
explicit PEAssignPattern();
explicit PEAssignPattern(const std::list<PExpr*>&p);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEAssignPattern() override;
Handle array assignment patters through pform. This gets us to elaboration. In the process also fix up ivl_type_t type comparisons to do deep type comparison.
2013-09-29 23:48:42 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
void dump(std::ostream&) const override;
Handle array assignment patters through pform. This gets us to elaboration. In the process also fix up ivl_type_t type comparisons to do deep type comparison.
2013-09-29 23:48:42 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual unsigned test_width(Design*des, NetScope*scope, width_mode_t&mode) override;
Handle array assignment patters through pform. This gets us to elaboration. In the process also fix up ivl_type_t type comparisons to do deep type comparison.
2013-09-29 23:48:42 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Handle array assignment patters through pform. This gets us to elaboration. In the process also fix up ivl_type_t type comparisons to do deep type comparison.
2013-09-29 23:48:42 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Parse/elaborate some array-patterns down to the ivl_target API.
2013-10-10 05:15:10 +02:00
private:
Add initial support for packed arrays/vector assignment pattern SystemVerilog allows to use assignment patterns to assign a value to a packed array. This is similar to using a concatenation, with the difference that for concatenations the values are evaluated in a self-determined context and for assignment patterns they are evaluated in a context defined by the element type of the packed array. This means that the value is for example automatically width expanded or truncated if it does not have the same size as the element type. Automatic type conversion is also done when allowed. E.g. ``` bit [3:0][3:0] x = '{1'b1, 32'h2, 3.0, "TEST"}; $display("%x", x); // -> 1234 ``` Nested assignment patterns are also supported. E.g. ``` bit [1:0][3:0][3:0] x = '{'{1, 2, 3, 4.0}, '{5, 6, 7, 8}}; $display("%x", x); // -> 12345678 ``` Add support for using assignment patterns as the right hand side value. Since the complete type of the target variable is required to correctly evaluate the assignment pattern it is handled as a special case in `elab_rval_expression()`. For other types of expressions for packed values only the total width of the target value is provided to the rvalue elaboration function. SystemVerilog also supports assignment patterns for the left hand side in assignments. This is not yet supported. Also not yet supported is specifying array elements by index, including `default`. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-26 11:53:49 +02:00
NetExpr* elaborate_expr_packed_(Design *des, NetScope *scope,
ivl_variable_type_t base_type,
unsigned int width,
Add a typedef for `std::vector<netrange_t>` `std::vector<netrange_t>` is used for signal array dimensions. As such it is used in quite a few places. Add a typedef that can be used as a shorthand to refer to it. This helps to keep lines where this is used from growing to overly long. The new type is called `netranges_t`. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-01-06 15:24:20 +01:00
const netranges_t &dims,
Add initial support for packed arrays/vector assignment pattern SystemVerilog allows to use assignment patterns to assign a value to a packed array. This is similar to using a concatenation, with the difference that for concatenations the values are evaluated in a self-determined context and for assignment patterns they are evaluated in a context defined by the element type of the packed array. This means that the value is for example automatically width expanded or truncated if it does not have the same size as the element type. Automatic type conversion is also done when allowed. E.g. ``` bit [3:0][3:0] x = '{1'b1, 32'h2, 3.0, "TEST"}; $display("%x", x); // -> 1234 ``` Nested assignment patterns are also supported. E.g. ``` bit [1:0][3:0][3:0] x = '{'{1, 2, 3, 4.0}, '{5, 6, 7, 8}}; $display("%x", x); // -> 12345678 ``` Add support for using assignment patterns as the right hand side value. Since the complete type of the target variable is required to correctly evaluate the assignment pattern it is handled as a special case in `elab_rval_expression()`. For other types of expressions for packed values only the total width of the target value is provided to the rvalue elaboration function. SystemVerilog also supports assignment patterns for the left hand side in assignments. This is not yet supported. Also not yet supported is specifying array elements by index, including `default`. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-26 11:53:49 +02:00
unsigned int cur_dim,
bool need_const) const;
Add initial support for struct assignment pattern Structs can be initialized by an assignment pattern. E.g. ``` struct packed { int x; shortint y; } S = '{ 1, 2}; ``` is the same as ``` struct packed { int x; shortint y; } S; s.x = 1; s.y = 2; ``` Add initial support for unnamed struct assignment patterns. Named struct assignment patterns like ``` struct packed { int x; shortint y; } S = '{x: 1, y: 2}; ``` are still unsupported. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-10-05 00:06:58 +02:00
NetExpr* elaborate_expr_struct_(Design *des, NetScope *scope,
const netstruct_t *struct_type,
bool need_const) const;
Add initial support for array assignment patterns SystemVerilog allows to use assignment patterns to assign values to an array. E.g. `int a[4] = '{1, 2, 3, 4}`. Each value is evaluated in the context of the element type of the array. Nested assignment patterns are supported. E.g. `int a[2][2] = '{'{1, 2}, '{1, 2}};` Add initial support for array assignment patterns for both continuous as well as procedural assignments. For continuous assignments the assignment pattern is synthesized into an array of nets. Each pin is connected to one of the assignment pattern values and then the whole net array is connected to target array. For procedural assignments it is unrolled in the vvp backend. E.g effectively turning `a = '{1, 2};` into `a[0] = 1; a[1] = 2;`. Not yet supported are indexed initializers or `default`. E.g. `int a[10] = '{1:10, default: 20};` Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-06-17 20:07:33 +02:00
NetExpr* elaborate_expr_array_(Design *des, NetScope *scope,
const netarray_t *array_type,
bool need_const, bool up) const;
NetExpr* elaborate_expr_uarray_(Design *des, NetScope *scope,
const netuarray_t *uarray_type,
Add a typedef for `std::vector<netrange_t>` `std::vector<netrange_t>` is used for signal array dimensions. As such it is used in quite a few places. Add a typedef that can be used as a shorthand to refer to it. This helps to keep lines where this is used from growing to overly long. The new type is called `netranges_t`. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-01-06 15:24:20 +01:00
const netranges_t &dims,
Add initial support for array assignment patterns SystemVerilog allows to use assignment patterns to assign values to an array. E.g. `int a[4] = '{1, 2, 3, 4}`. Each value is evaluated in the context of the element type of the array. Nested assignment patterns are supported. E.g. `int a[2][2] = '{'{1, 2}, '{1, 2}};` Add initial support for array assignment patterns for both continuous as well as procedural assignments. For continuous assignments the assignment pattern is synthesized into an array of nets. Each pin is connected to one of the assignment pattern values and then the whole net array is connected to target array. For procedural assignments it is unrolled in the vvp backend. E.g effectively turning `a = '{1, 2};` into `a[0] = 1; a[1] = 2;`. Not yet supported are indexed initializers or `default`. E.g. `int a[10] = '{1:10, default: 20};` Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-06-17 20:07:33 +02:00
unsigned int cur_dim,
Add initial support for packed arrays/vector assignment pattern SystemVerilog allows to use assignment patterns to assign a value to a packed array. This is similar to using a concatenation, with the difference that for concatenations the values are evaluated in a self-determined context and for assignment patterns they are evaluated in a context defined by the element type of the packed array. This means that the value is for example automatically width expanded or truncated if it does not have the same size as the element type. Automatic type conversion is also done when allowed. E.g. ``` bit [3:0][3:0] x = '{1'b1, 32'h2, 3.0, "TEST"}; $display("%x", x); // -> 1234 ``` Nested assignment patterns are also supported. E.g. ``` bit [1:0][3:0][3:0] x = '{'{1, 2, 3, 4.0}, '{5, 6, 7, 8}}; $display("%x", x); // -> 12345678 ``` Add support for using assignment patterns as the right hand side value. Since the complete type of the target variable is required to correctly evaluate the assignment pattern it is handled as a special case in `elab_rval_expression()`. For other types of expressions for packed values only the total width of the target value is provided to the rvalue elaboration function. SystemVerilog also supports assignment patterns for the left hand side in assignments. This is not yet supported. Also not yet supported is specifying array elements by index, including `default`. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-26 11:53:49 +02:00
bool need_const) const;
Handle array assignment patters through pform. This gets us to elaboration. In the process also fix up ivl_type_t type comparisons to do deep type comparison.
2013-09-29 23:48:42 +02:00
private:
std::vector<PExpr*>parms_;
};
Parse and elaborate the concatenate operator in structural contexts, Replace vector<PExpr*> and list<PExpr*> with svector<PExpr*>, evaluate constant expressions with parameters, handle memories as lvalues. Parse task declarations, integer types.
1999-05-10 02:16:57 +02:00
class PEConcat : public PExpr {
public:
Remove "using namespace std" from compiler header files and fix the fallout.
2021-11-04 17:12:04 +01:00
explicit PEConcat(const std::list<PExpr*>&p, PExpr*r =0);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEConcat() override;
Parse and elaborate the concatenate operator in structural contexts, Replace vector<PExpr*> and list<PExpr*> with svector<PExpr*>, evaluate constant expressions with parameters, handle memories as lvalues. Parse task declarations, integer types.
1999-05-10 02:16:57 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Check lvalue of procedural continuous assign (PR#29)
2000-12-06 07:31:09 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void declare_implicit_nets(LexicalScope*scope, NetNet::Type type) override;
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design*des, NetScope*scope) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
Clean up some handling of test_width for ternary expressions. The condition expression needs its width tested, even if the width is not used. Also clean up some handling of widths/types for other expression types.
2008-10-19 07:00:22 +02:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Clean up some handling of test_width for ternary expressions. The condition expression needs its width tested, even if the width is not used. Also clean up some handling of widths/types for other expression types.
2008-10-19 07:00:22 +02:00
Check what can drive a variable in SystemVerilog
2025-07-01 08:47:38 +02:00
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
bool var_allowed_in_sv) const override;
Check what can drive a variable in SystemVerilog
2025-07-01 08:47:38 +02:00
virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
bool var_allowed_in_sv) const override;
Handle nil queue as a was to delete a queue. Treat this like assigning null to a dynamic array. This deletes the queue and thus has the effect of clearing it.
2014-09-02 21:19:58 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Handle nil queue as a was to delete a queue. Treat this like assigning null to a dynamic array. This deletes the queue and thus has the effect of clearing it.
2014-09-02 21:19:58 +02:00
Detect missing indices to memories (PR#421)
2002-04-13 04:33:17 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Unify elaboration of l-values for all proceedural assignments, including assing, cassign and force. Generate NetConcat devices for gate outputs that feed into a vector results. Use this to hande gate arrays. Also let gate arrays handle vectors of gates when the outputs allow for it.
2004-12-30 00:55:43 +01:00
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
Handle out-of range and undefined LHS word indices in assignments. For constant word indices, issue a warning if the index is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-18 20:21:37 +02:00
bool is_cassign,
Add support for `const` variables SystemVerilog allows to declare const variables. These variables are read-only and can not be assigned a value after their declaration. It is only possible to assign an initial value as an initializer. E.g. ``` const int x = 10; x = 20; // Error ``` The LRM requires that for variable declarations with static storage the initializer is a constant expression with the extension that other const variables are also allowed. const variables with automatic storage can be initialized by any expression. Checking if an expression contains only const variables requires a bit more work to implement. So for now be more lenient that what the standard requires and allow arbitrary expressions to initialize const variables even for those with static storage. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-01-03 21:24:23 +01:00
bool is_force,
More cppcheck updates
2025-10-13 22:14:57 +02:00
bool is_init = false) const override;
An input port driven by a variable is not collapsible
2020-12-01 07:44:54 +01:00
virtual bool is_collapsible_net(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
NetNet::PortType port_type) const override;
Allow concatenations as arguments to inout ports.
2006-04-28 06:28:35 +02:00
private:
NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
Check what can drive a variable in SystemVerilog
2025-07-01 08:47:38 +02:00
bool bidirectional_flag,
bool var_allowed_in_sv) const;
Parse and elaborate the concatenate operator in structural contexts, Replace vector<PExpr*> and list<PExpr*> with svector<PExpr*>, evaluate constant expressions with parameters, handle memories as lvalues. Parse task declarations, integer types.
1999-05-10 02:16:57 +02:00
private:
Remove "using namespace std" from compiler header files and fix the fallout.
2021-11-04 17:12:04 +01:00
std::vector<PExpr*>parms_;
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
std::valarray<width_mode_t>width_modes_;
Elaborate concatenation expression put tested widths to use. Concatenation expressions need to use the tested widths of its argument expressions during elaboration.
2008-11-19 01:52:05 +01:00
Add support for the Ternary operator, Add support for repeat concatenation, Correct some seg faults cause by elaboration errors, Parse the casex anc casez statements.
1999-06-10 06:03:52 +02:00
PExpr*repeat_;
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetScope*tested_scope_;
unsigned repeat_count_;
Parse and elaborate the concatenate operator in structural contexts, Replace vector<PExpr*> and list<PExpr*> with svector<PExpr*>, evaluate constant expressions with parameters, handle memories as lvalues. Parse task declarations, integer types.
1999-05-10 02:16:57 +02:00
};
Named events as far as the pform.
2000-04-01 21:31:57 +02:00
/*
* Event expressions are expressions that can be combined with the
* event "or" operator. These include "posedge foo" and similar, and
* also include named events. "edge" events are associated with an
* expression, whereas named events simply have a name, which
* represents an event variable.
*/
Parse OR of event expressions.
1999-04-29 04:16:26 +02:00
class PEEvent : public PExpr {
public:
Add support for SV edge
2021-01-07 10:22:13 +01:00
enum edge_t {ANYEDGE, POSEDGE, NEGEDGE, EDGE, POSITIVE};
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
Named events as far as the pform.
2000-04-01 21:31:57 +02:00
// Use this constructor to create events based on edges or levels.
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
PEEvent(edge_t t, PExpr*e);
Named events as far as the pform.
2000-04-01 21:31:57 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEEvent() override;
Parse OR of event expressions.
1999-04-29 04:16:26 +02:00
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
edge_t type() const;
PExpr* expr() const;
Clean up spurious trailing white space.
2004-10-04 03:10:51 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Parse OR of event expressions.
1999-04-29 04:16:26 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design*des, NetScope*scope) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
Parse OR of event expressions.
1999-04-29 04:16:26 +02:00
private:
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
edge_t type_;
PExpr *expr_;
Parse OR of event expressions.
1999-04-29 04:16:26 +02:00
};
Support decimal constants in behavioral delays.
2000-12-10 23:01:35 +01:00
/*
* This holds a floating point constant in the source.
*/
class PEFNumber : public PExpr {
public:
explicit PEFNumber(verireal*vp);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEFNumber() override;
Support decimal constants in behavioral delays.
2000-12-10 23:01:35 +01:00
const verireal& value() const;
Handle widths of real value arguments to user functions. The arguments to user defined functions are self-determined. And if the result is real valued, we can call them lossless self-determined. Treat these arguments like r-value elaboration for assignments. Also clean up the binary divide elaboration a little bit. Also, floating point literals are unsized with width==1.
2008-09-26 05:37:18 +02:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Generate code to implement new element initializers.
2013-10-19 03:32:56 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Detect missing indices to memories (PR#421)
2002-04-13 04:33:17 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Generalize the evaluation of floating point delays, and get it working with delay assignment statements. Allow parameters to be referenced by hierarchical name.
2001-01-15 00:04:55 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Support decimal constants in behavioral delays.
2000-12-10 23:01:35 +01:00
private:
verireal*value_;
};
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
class PEIdent : public PExpr {
public:
Add lexical position information to PEIdent objects.
2024-02-18 17:08:24 +01:00
explicit PEIdent(perm_string, unsigned lexical_pos, bool no_implicit_sig=false);
explicit PEIdent(PPackage*pkg, const pform_name_t&name, unsigned lexical_pos);
explicit PEIdent(const pform_name_t&, unsigned lexical_pos);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEIdent() override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Spelling fixes mostly comments, but includes some identifiers and message text
2008-01-25 22:34:51 +01:00
// Add another name to the string of hierarchy that is the
Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
// current identifier.
void append_name(perm_string);
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void declare_implicit_nets(LexicalScope*scope, NetNet::Type type) override;
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design*des, NetScope*scope) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
Remove last bits of relax_width methods, and use test_width to calculate the width of an r-value expression that may contain unsized numbers.
2006-11-04 07:19:24 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
separate assign lval elaboration for error checking.
1999-09-15 06:17:52 +02:00
// Identifiers are allowed (with restrictions) is assign l-values.
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope, bool var_allowed_in_sv) const override;
separate assign lval elaboration for error checking.
1999-09-15 06:17:52 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope, bool var_allowed_in_sv) const override;
Implement bi-directional part selects.
2005-08-06 19:58:16 +02:00
move lval elaboration to PExpr virtual methods.
2000-09-09 17:21:26 +02:00
// Identifiers are also allowed as procedural assignment l-values.
Unify elaboration of l-values for all proceedural assignments, including assing, cassign and force. Generate NetConcat devices for gate outputs that feed into a vector results. Use this to hande gate arrays. Also let gate arrays handle vectors of gates when the outputs allow for it.
2004-12-30 00:55:43 +01:00
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
Handle out-of range and undefined LHS word indices in assignments. For constant word indices, issue a warning if the index is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-18 20:21:37 +02:00
bool is_cassign,
Add support for `const` variables SystemVerilog allows to declare const variables. These variables are read-only and can not be assigned a value after their declaration. It is only possible to assign an initial value as an initializer. E.g. ``` const int x = 10; x = 20; // Error ``` The LRM requires that for variable declarations with static storage the initializer is a constant expression with the extension that other const variables are also allowed. const variables with automatic storage can be initialized by any expression. Checking if an expression contains only const variables requires a bit more work to implement. So for now be more lenient that what the standard requires and allow arbitrary expressions to initialize const variables even for those with static storage. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-01-03 21:24:23 +01:00
bool is_force,
More cppcheck updates
2025-10-13 22:14:57 +02:00
bool is_init = false) const override;
move lval elaboration to PExpr virtual methods.
2000-09-09 17:21:26 +02:00
Handle class-type identifier expressions.
2012-11-22 20:08:13 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Detect missing indices to memories (PR#421)
2002-04-13 04:33:17 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
separate assign lval elaboration for error checking.
1999-09-15 06:17:52 +02:00
Module ports are really special PEIdent expressions, because a name can be used many places in the port list.
2000-05-16 06:05:15 +02:00
// Elaborate the PEIdent as a port to a module. This method
// only applies to Ident expressions.
Extend VPI and build to for SIMetrix cosimulation Added: basic vpiPort VPI Objects for vpiModulkes vpiDirection, vpiPortIndex, vpiName, vpiSize attributes Since ports do not exist as net-like entities (nets either side module instance boundaries are in effect connect directly in the language front-ends internal representation) the port information is effectively just meta-data passed through t-dll interface and output as a additional annotation of module scopes in vvp. Added: vpiLocalParam attribute for vpiParameter VPI objects Added: support build for 32-bit target on 64-bit host (--with-m32 option to configure.in and minor tweaks to Makefiles and systemc-vpi).
2012-06-04 21:43:33 +02:00
NetNet* elaborate_subport(Design*des, NetScope*sc) const;
Module ports are really special PEIdent expressions, because a name can be used many places in the port list.
2000-05-16 06:05:15 +02:00
First pass at support for continuous assign of unpacked net arrays.
2014-03-17 01:08:38 +01:00
// Elaborate the identifier allowing for unpacked arrays. This
// method only applies to Ident expressions because only Ident
// expressions can can be unpacked arrays.
NetNet* elaborate_unpacked_net(Design*des, NetScope*sc) const;
An input port driven by a variable is not collapsible
2020-12-01 07:44:54 +01:00
virtual bool is_collapsible_net(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
NetNet::PortType port_type) const override;
Fix for pr3194155. Currently the compiler coerces input ports to inout ports whenever there is an internal driver connected to the internal port net. This generates an error if the port is externally connected to something other than a structural net. This patch modifies the compiler to ensure port coercion only occurs in valid cases.
2011-03-13 14:29:42 +01:00
Add common implementation for scoped symbol search In SystemVerilog identifiers can usually have an additional package scope in which they should be resolved. At the moment there are many places in the code base that handle the resolution of the package scope. Add a common data type for package scoped paths as well as a symbol_search() variant that works on package scoped identifiers. This allows to handle package scope resolution in a central place. Having the code in a central place makes it easier to ensure consistent and correct behavior. E.g. there are currently some corner case bugs that are common to all implementations. With the common implementation it only has to be fixed in one place. It will also make it easier to eventually implement class scoped identifiers. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-25 10:39:41 +02:00
const pform_scoped_name_t& path() const { return path_; }
Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
Add lexical position information to PEIdent objects.
2024-02-18 17:08:24 +01:00
unsigned lexical_pos() const { return lexical_pos_; }
Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
private:
Add common implementation for scoped symbol search In SystemVerilog identifiers can usually have an additional package scope in which they should be resolved. At the moment there are many places in the code base that handle the resolution of the package scope. Add a common data type for package scoped paths as well as a symbol_search() variant that works on package scoped identifiers. This allows to handle package scope resolution in a central place. Having the code in a central place makes it easier to ensure consistent and correct behavior. E.g. there are currently some corner case bugs that are common to all implementations. With the common implementation it only has to be fixed in one place. It will also make it easier to eventually implement class scoped identifiers. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-25 10:39:41 +02:00
pform_scoped_name_t path_;
Add lexical position information to PEIdent objects.
2024-02-18 17:08:24 +01:00
unsigned lexical_pos_;
Allow connecting module instance using implicit named port connections. This is part of the 1800-2009 standard (Section 23.3.2.3) and allows ports of module instances to be declared like: modname instance(.foo, .bar); instead of modname instead(.foo(foo), .bar(bar)); The only tricky part about this is the implicit port connection shall not create an implicit net declaration. To make this happen, the path of least resistance was to add a bool to PEIdent indicating that it should not implicitely create a net. This does not rely on the generation flag to be 2009, following the trend that new port naming convention (like ANSI style ports) work regardless of the generation.
2009-11-26 07:10:53 +01:00
bool no_implicit_sig_;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Remove last bits of relax_width methods, and use test_width to calculate the width of an r-value expression that may contain unsized numbers.
2006-11-04 07:19:24 +01:00
private:
Handle part selects with bad (xz) bits. Part selects need to be fully defined. If not, then the resulting expression is 'bx no matter what. The same for bit selects, when the bit select expression is constant.
2009-01-02 01:20:41 +01:00
// Common functions to calculate parts of part/bit
// selects. These methods return true if the expressions
// elaborate/calculate, or false if there is some sort of
// source error.
Improve net bit select calculations.
2012-04-30 20:48:33 +02:00
bool calculate_bits_(Design*, NetScope*, long&msb, bool&defined) const;
Handle part selects with bad (xz) bits. Part selects need to be fully defined. If not, then the resulting expression is 'bx no matter what. The same for bit selects, when the bit select expression is constant.
2009-01-02 01:20:41 +01:00
// The calculate_parts_ method calculates the range
// expressions of a part select for the current object. The
// part select expressions are elaborated and evaluated, and
// the values written to the msb/lsb arguments. If there are
// invalid bits (xz) in either expression, then the defined
// flag is set to *false*.
bool calculate_parts_(Design*, NetScope*, long&msb, long&lsb, bool&defined) const;
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
NetExpr* calculate_up_do_base_(Design*, NetScope*, bool need_const) const;
Fix up parameter name part select Part select of parameter names is fixed up to be structurally similar to part select of signals, and also to behave similarly. (Though not identically, for reason.)
2008-06-08 16:34:45 +02:00
Remove last bits of relax_width methods, and use test_width to calculate the width of an r-value expression that may contain unsized numbers.
2006-11-04 07:19:24 +01:00
bool calculate_up_do_width_(Design*, NetScope*, unsigned long&wid) const;
Get packed signals working through to simulation in some situations. When dynamic indexing of early dimensions is not needed, we can get pretty far with getting packed arrays to work.
2012-02-11 02:17:59 +01:00
// Evaluate the prefix indices. All but the final index in a
// chain of indices must be a single value and must evaluate
// to constants at compile time. For example:
// [x] - OK
// [1][2][x] - OK
// [1][x:y] - OK
// [2:0][x] - BAD
// [y][x] - BAD
// Leave the last index for special handling.
bool calculate_packed_indices_(Design*des, NetScope*scope, NetNet*net,
std::list<long>&prefix_indices) const;
Fix part selects in l-values.
2006-04-16 02:15:43 +02:00
private:
Allow access to static properties of base classes Classes are allowed to access properties of the base class. This also includes static properties. Currently when looking up a static property only those of the class itself are considered. Extend this to also consider properties of the base classes. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-24 19:01:54 +02:00
Factor out code for reporting mixed assignment conflicts. This makes the error reporting uniform.
2024-02-03 21:24:22 +01:00
void report_mixed_assignment_conflict_(const char*category) const;
Refactor code to reduce indentation level. In preparation for next commit. No functional change.
2024-02-02 23:24:18 +01:00
NetAssign_ *elaborate_lval_array_(Design *des, NetScope *scope,
bool is_force, NetNet *reg) const;
Allow access to static properties of base classes Classes are allowed to access properties of the base class. This also includes static properties. Currently when looking up a static property only those of the class itself are considered. Extend this to also consider properties of the base classes. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-24 19:01:54 +02:00
NetAssign_ *elaborate_lval_var_(Design *des, NetScope *scope,
bool is_force, bool is_cassign,
NetNet *reg, ivl_type_t data_type,
pform_name_t tail_path) const;
Handle out-of range and undefined LHS word indices in assignments. For constant word indices, issue a warning if the index is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-18 20:21:37 +02:00
NetAssign_*elaborate_lval_net_word_(Design*, NetScope*, NetNet*,
Allow force assignments on unresolved wire array words. A force doesn't require resolution. We already allow this for individual unresolved wires.
2024-01-28 15:33:17 +01:00
bool need_const_idx, bool is_force) const;
Handle out-of range and undefined LHS bit/part selects in assignments. For constant bit/part selects, issue a warning if the select is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-21 22:44:31 +02:00
bool elaborate_lval_net_bit_(Design*, NetScope*, NetAssign_*,
Ignore force statements when checking for mixed assignment conflicts. This was already done in some places. Do it everywhere.
2024-02-03 20:23:15 +01:00
bool need_const_idx, bool is_force) const;
bool elaborate_lval_net_part_(Design*, NetScope*, NetAssign_*,
bool is_force) const;
More array fixes and down indexed part selects can be a lval. Here are some more array fixes. They are mostly better error messages instead of just asserting and some code cleanup. The one new thing that probably should have been a separate submission is that down indexed part select [base -: width] can now be a lvalue.
2007-11-07 20:26:56 +01:00
bool elaborate_lval_net_idx_(Design*, NetScope*, NetAssign_*,
Handle out-of range and undefined LHS bit/part selects in assignments. For constant bit/part selects, issue a warning if the select is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-21 22:44:31 +02:00
index_component_t::ctype_t,
Ignore force statements when checking for mixed assignment conflicts. This was already done in some places. Do it everywhere.
2024-02-03 20:23:15 +01:00
bool need_const_idx, bool is_force) const;
Add support for class static properties. Static properties are like variables in a named scope. Detect these variables during elaboration so that the code generator just sees them as variables.
2013-07-03 04:41:58 +02:00
NetAssign_*elaborate_lval_net_class_member_(Design*, NetScope*,
Add support for handling `super` keyword SystemVerilog allows to use the `super` keyword to access properties and methods of a base class. This is useful if there is for example an identifier with the same name in the current class as in the base class and the code wants to access the base class identifier. To support this a bit of refactoring is required. Currently properties are internally referenced by name, this does not work if there are multiple properties of the same. Instead reference properties always by index. In addition when looking up an identifier that resolves to an object return both the type and the object itself. This is necessary since both `this` and `super` resolve to the same object, but each with a different type. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-25 14:39:58 +02:00
const netclass_t *class_type,
Add support for class static properties. Static properties are like variables in a named scope. Detect these variables during elaboration so that the code generator just sees them as variables.
2013-07-03 04:41:58 +02:00
NetNet*,
Support nested struct l-values.
2019-09-16 22:50:17 +02:00
pform_name_t) const;
Packed struct members in behavioral assign l-values.
2012-01-04 02:38:08 +01:00
bool elaborate_lval_net_packed_member_(Design*, NetScope*,
NetAssign_*,
Ignore force statements when checking for mixed assignment conflicts. This was already done in some places. Do it everywhere.
2024-02-03 20:23:15 +01:00
pform_name_t member_path, bool is_force) const;
Elaborate dynamic array expressions (lval/rval) down to ivl_target.h
2012-07-21 17:59:29 +02:00
bool elaborate_lval_darray_bit_(Design*, NetScope*,
Ignore force statements when checking for mixed assignment conflicts. This was already done in some places. Do it everywhere.
2024-02-03 20:23:15 +01:00
NetAssign_*, bool is_force) const;
Fix part selects in l-values.
2006-04-16 02:15:43 +02:00
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
private:
Handle context signedness and width expansion for class properties The signedness of an expression can change depending on its context. E.g. for an arithmetic operation with one unsigned operand all operands are treated as unsigned. This is currently not considered when accessing class properties. This can lead to incorrect behavior with regards to sign extension. E.g. the following will print 4294967295 rather than 65535. ``` class C; shortint x = -1; endclass ... C c = new; $display(c.x + 32'h0); ``` Furthermore the return value is not expanded to the width of its context. This can cause vvp to crash with an exception when it expects a vector on the stack to have a certain width. E.g. ``` class C; shortint x = -1; endclass ... C c = new; int x; bit a = 1'b1; x = a ? c.x : 64'h0; ``` Solve both of this by using `pad_to_width()` on the property expression if it is a vectorable type. Since any identifier, not just class properties, need to have this done insert this on the common path and remove the `pad_to_width()` call on individual paths. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-07 11:35:05 +02:00
NetExpr* elaborate_expr_(Design *des, NetScope *scope,
unsigned expr_wid, unsigned flags) const;
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
NetExpr*elaborate_expr_param_or_specparam_(Design*des,
NetScope*scope,
const NetExpr*par,
NetScope*found_in,
ivl_type_t par_type,
unsigned expr_wid,
unsigned flags) const;
Elaborate of PGAssign always passes calculated width. the PGAssign elaborate method used the test_width to get the width of the r-value expression. This should be completely sufficient to get the width of the expression, so always use a defined width to elaborate the expression.
2008-09-21 04:23:54 +02:00
NetExpr*elaborate_expr_param_(Design*des,
NetScope*scope,
const NetExpr*par,
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
const NetScope*found_in,
Rework parsing of parameter types Use the common data_type_or_implicit rules to support type definitions for parameters. This eliminates a bunch of special rules in parse.y, and opens the door for parameters having more complex types.
2020-12-25 03:12:06 +01:00
ivl_type_t par_type,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
unsigned expr_wid,
unsigned flags) const;
Add elaborate_expr_param_bit_ and pass param refs for variable selects For variable parameter selects (indexed and bit) pass the value being selected as a parameter reference instead of just a numeric constant so it is easy to get the underlying parameter information. Move the parameter bit select code into its own routine and cleanup the remaining general code. This should not effect the VVP code, but the ivl_expr_parameter(<expr>) routine can be used to get at the actual parameter information in the vlog95 target.
2013-07-06 01:07:19 +02:00
NetExpr*elaborate_expr_param_bit_(Design*des,
NetScope*scope,
const NetExpr*par,
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
const NetScope*found_in,
Rework parsing of parameter types Use the common data_type_or_implicit rules to support type definitions for parameters. This eliminates a bunch of special rules in parse.y, and opens the door for parameters having more complex types.
2020-12-25 03:12:06 +01:00
ivl_type_t par_type,
Add elaborate_expr_param_bit_ and pass param refs for variable selects For variable parameter selects (indexed and bit) pass the value being selected as a parameter reference instead of just a numeric constant so it is easy to get the underlying parameter information. Move the parameter bit select code into its own routine and cleanup the remaining general code. This should not effect the VVP code, but the ivl_expr_parameter(<expr>) routine can be used to get at the actual parameter information in the vlog95 target.
2013-07-06 01:07:19 +02:00
bool need_const) const;
Fix up parameter name part select Part select of parameter names is fixed up to be structurally similar to part select of signals, and also to behave similarly. (Though not identically, for reason.)
2008-06-08 16:34:45 +02:00
NetExpr*elaborate_expr_param_part_(Design*des,
NetScope*scope,
const NetExpr*par,
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
const NetScope*found_in,
Rework parsing of parameter types Use the common data_type_or_implicit rules to support type definitions for parameters. This eliminates a bunch of special rules in parse.y, and opens the door for parameters having more complex types.
2020-12-25 03:12:06 +01:00
ivl_type_t par_type,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const;
Rework parameter indexed part select up. Indexed part select reworked to be more compact and more like the part select.
2008-06-09 04:29:00 +02:00
NetExpr*elaborate_expr_param_idx_up_(Design*des,
NetScope*scope,
const NetExpr*par,
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
const NetScope*found_in,
Rework parsing of parameter types Use the common data_type_or_implicit rules to support type definitions for parameters. This eliminates a bunch of special rules in parse.y, and opens the door for parameters having more complex types.
2020-12-25 03:12:06 +01:00
ivl_type_t par_type,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
bool need_const) const;
Major rewrite of indexed part selects. This patch is a major rewrite of the indexed part selects (+: and -:). It made the following enhancements: 1. Make indexed part selects work correctly with both big and little endian vectors. 2. Add a warning flag that warns about constant out of bounds/or 'bx indexed selects. 3. Moved the -: parameter code to its own routine. 4. Added support for straddling before part selects in a CA. 5. Added more assert(! number_is_unknown) statements. 6. Add warning for &PV<> select with a signed index signal that is less than the width of an int. This will be fixed later. 7. Add support for loading a 'bx/'bz constant into a numeric register. 8. Add a number of signed value fixes to the compiler/code generator. 9. Major fix of draw_select_expr() in the code generator.
2009-08-29 01:50:59 +02:00
NetExpr*elaborate_expr_param_idx_do_(Design*des,
NetScope*scope,
const NetExpr*par,
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
const NetScope*found_in,
Rework parsing of parameter types Use the common data_type_or_implicit rules to support type definitions for parameters. This eliminates a bunch of special rules in parse.y, and opens the door for parameters having more complex types.
2020-12-25 03:12:06 +01:00
ivl_type_t par_type,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
bool need_const) const;
Reorganize signal part select handling, and add support for indexed part selects. Expand expression constant propagation to eliminate extra sums in certain cases.
2005-11-10 14:28:11 +01:00
NetExpr*elaborate_expr_net(Design*des,
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
NetScope*scope,
NetNet*net,
NetScope*found,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
unsigned flags) const;
Major rework of array handling. Memories are replaced with the more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
2007-01-16 06:44:14 +01:00
NetExpr*elaborate_expr_net_word_(Design*des,
NetScope*scope,
NetNet*net,
NetScope*found,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
unsigned flags) const;
Reorganize signal part select handling, and add support for indexed part selects. Expand expression constant propagation to eliminate extra sums in certain cases.
2005-11-10 14:28:11 +01:00
NetExpr*elaborate_expr_net_part_(Design*des,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetScope*scope,
NetESignal*net,
NetScope*found,
unsigned expr_wid) const;
Reorganize signal part select handling, and add support for indexed part selects. Expand expression constant propagation to eliminate extra sums in certain cases.
2005-11-10 14:28:11 +01:00
NetExpr*elaborate_expr_net_idx_up_(Design*des,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetScope*scope,
NetESignal*net,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
NetScope*found,
bool need_const) const;
Reorganize signal part select handling, and add support for indexed part selects. Expand expression constant propagation to eliminate extra sums in certain cases.
2005-11-10 14:28:11 +01:00
NetExpr*elaborate_expr_net_idx_do_(Design*des,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetScope*scope,
NetESignal*net,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
NetScope*found,
bool need_const) const;
Reorganize signal part select handling, and add support for indexed part selects. Expand expression constant propagation to eliminate extra sums in certain cases.
2005-11-10 14:28:11 +01:00
NetExpr*elaborate_expr_net_bit_(Design*des,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetScope*scope,
NetESignal*net,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
NetScope*found,
bool need_const) const;
Handle queue types and expressions at pform level.
2014-07-30 05:41:03 +02:00
NetExpr*elaborate_expr_net_bit_last_(Design*des,
NetScope*scope,
NetESignal*net,
NetScope*found,
bool need_const) const;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
NetExpr *elaborate_expr_class_field_(Design*des, NetScope*scope,
Add support for handling `super` keyword SystemVerilog allows to use the `super` keyword to access properties and methods of a base class. This is useful if there is for example an identifier with the same name in the current class as in the base class and the code wants to access the base class identifier. To support this a bit of refactoring is required. Currently properties are internally referenced by name, this does not work if there are multiple properties of the same. Instead reference properties always by index. In addition when looking up an identifier that resolves to an object return both the type and the object itself. This is necessary since both `this` and `super` resolve to the same object, but each with a different type. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-25 14:39:58 +02:00
const symbol_search_results &sr,
Support access to class constants on objects It is allowed to access a constant declared in a class scope, such as a enum value or parameter, on an object of that class type. This is described in section 8.5 ("Object properties and object parameter data") of the LRM (1800-2017). E.g. ``` class C enum { A } e; endclass C c = new; c.e = c.A; ``` Support this by in addition of searching for class properties on the object also search for constants in the class scope. A bit of refactoring is needed around the parameter elaboration functions since they expect a non-const NetScope, but for classes we only have a const scope available. The non-const scope is needed to be able to mark specparams as non-annotatable. Since classes can't have specparams this part is factored out into a separate function the NetScope parameter for the shared functions is made const. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-02-19 12:58:27 +01:00
unsigned expr_wid,
unsigned flags) const;
unsigned test_width_parameter_(const NetExpr *par, width_mode_t&mode);
Elaborate class task and function methods. The parse of class methods already works, this patch forms the methods into their own scopes, and elaborates those scopes. The "this"
2013-03-15 04:08:32 +01:00
Correctly calculate width of nested path identifiers The current `PEIdent::test_width()` method is only able to calculate width of a path with up to two elements. For more complex paths it will not be able to calculate the width. E.g. * Nested struct member access * function call of a enum member in a struct To make nested structures work properly walk the whole path tail element by element updating the type along the way. Also take the indices into account and update the type if an arrays dimensions have been fully consumed. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-12-27 17:56:50 +01:00
ivl_type_t resolve_type_(Design *des, const symbol_search_results &sr,
unsigned int &index_depth) const;
Add support for memory words in l-value of blocking assignments, and remove the special NetAssignMem class.
2002-06-04 07:38:43 +02:00
private:
Implement bi-directional part selects.
2005-08-06 19:58:16 +02:00
NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
Check what can drive a variable in SystemVerilog
2025-07-01 08:47:38 +02:00
bool bidirectional_flag,
bool var_allowed_in_sv) const;
Implement bi-directional part selects.
2005-08-06 19:58:16 +02:00
Support nested struct l-values.
2019-09-16 22:50:17 +02:00
Use PartSelect/PV and VP to handle part selects through ports.
2005-01-09 21:16:00 +01:00
bool eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
Handle part selects of nets that fall of the ends of the identifier. The Verilog LRM specifies that it is legal to give constant part selects that are beyond the bounds of the identifier being selected. But elaboration was flagging that as an error. This patch changes it to a warning, and handles the cases by generating 'bx bits as needed.
2008-05-10 02:42:37 +02:00
long&midx, long&lidx) const;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
};
Parse/elaborate some array-patterns down to the ivl_target API.
2013-10-10 05:15:10 +02:00
class PENewArray : public PExpr {
Parse support for dynamic arrays. This includes limited support for dynamic arrays down to the code generator, and some stubs in the vvp code generator and vvp run time.
2012-07-14 03:41:41 +02:00
public:
Parse/elaborate some array-patterns down to the ivl_target API.
2013-10-10 05:15:10 +02:00
explicit PENewArray (PExpr*s, PExpr*i);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PENewArray() override;
Parse support for dynamic arrays. This includes limited support for dynamic arrays down to the code generator, and some stubs in the vvp code generator and vvp run time.
2012-07-14 03:41:41 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Support the new[] operator for arrays Implement through the ivl core to the ivl_target.h API. Also draft implementation of creating and storing arrays in the vvp runtime and code generator.
2012-07-16 05:44:07 +02:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Get some type information to the "new" expression for darrays.
2012-10-01 03:03:10 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Support the new[] operator for arrays Implement through the ivl core to the ivl_target.h API. Also draft implementation of creating and storing arrays in the vvp runtime and code generator.
2012-07-16 05:44:07 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Parse support for dynamic arrays. This includes limited support for dynamic arrays down to the code generator, and some stubs in the vvp code generator and vvp run time.
2012-07-14 03:41:41 +02:00
private:
PExpr*size_;
Parse/elaborate some array-patterns down to the ivl_target API.
2013-10-10 05:15:10 +02:00
PExpr*init_;
Parse support for dynamic arrays. This includes limited support for dynamic arrays down to the code generator, and some stubs in the vvp code generator and vvp run time.
2012-07-14 03:41:41 +02:00
};
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
class PENewClass : public PExpr {
public:
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
// New without (or with default) constructor
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
explicit PENewClass ();
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
// New with constructor arguments
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
explicit PENewClass (const std::list<named_pexpr_t> &p,
Add support for typed constructor calls By default when creating a new class object the type of the object is determined by the type of the target. SystemVerilog also allows to explicitly specify the type of the object to be created. The specified class still needs to be assignment compatible with the target. This is e.g. useful to construct an object of a derived class of the target. E.g. ``` class B; ... endclass class C extends B; ... endclass B b; b = C::new; ``` Add support for this to the parser as well as handling it during elaboration. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-18 12:39:18 +02:00
data_type_t *class_type = nullptr);
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PENewClass() override;
Implement class constructors. Class constructors are the "new" method in a class description. Elaborate the constructor as an ordinary method, but the only way to access this method is to implicitly call it. The elaborator will take the constructor call and generate a naked "new" expression and implicit constructor method call with the object itself as the return value.
2013-04-21 01:27:51 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
// Class objects don't have a useful width, but the expression
// is IVL_VT_CLASS.
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
// Note that class (new) expressions only appear in context
// that uses this form of the elaborate_expr method. In fact,
More spelling fixes Mostly comments Changs "initilzers" in a string visible with debug_elaborate. Includes a few British->American changes in the root directory only.
2014-01-31 01:16:19 +01:00
// the type argument is going to be a netclass_t object.
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
Elaborate implicit chaining of constructors in class new.
2013-11-02 23:00:40 +01:00
private:
NetExpr* elaborate_expr_constructor_(Design*des, NetScope*scope,
const netclass_t*ctype,
Elaborate PChainConstructor calls. It is better to leave the handling of PChainConstructor calls to the elaboration, instead of stripping them out early. This allows for handling the arguments of the chain constructor in the correct scope.
2013-11-10 04:45:03 +01:00
NetExpr*obj, unsigned flags) const;
Elaborate implicit chaining of constructors in class new.
2013-11-02 23:00:40 +01:00
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
private:
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
std::vector<named_pexpr_t> parms_;
Add support for typed constructor calls By default when creating a new class object the type of the object is determined by the type of the target. SystemVerilog also allows to explicitly specify the type of the object to be created. The specified class still needs to be assignment compatible with the target. This is e.g. useful to construct an object of a derived class of the target. E.g. ``` class B; ... endclass class C extends B; ... endclass B b; b = C::new; ``` Add support for this to the parser as well as handling it during elaboration. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-18 12:39:18 +02:00
data_type_t *class_type_;
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
};
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
class PENewCopy : public PExpr {
public:
explicit PENewCopy(PExpr*src);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PENewCopy() override;
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
// Class objects don't have a useful width, but the expression
// is IVL_VT_CLASS.
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
// Note that class (new) expressions only appear in context
// that uses this form of the elaborate_expr method. In fact,
More spelling fixes Mostly comments Changs "initilzers" in a string visible with debug_elaborate. Includes a few British->American changes in the root directory only.
2014-01-31 01:16:19 +01:00
// the type argument is going to be a netclass_t object.
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Parse to pform shallow copy "new" expressions.
2013-04-22 04:27:57 +02:00
private:
PExpr*src_;
};
Stub to pform class properties and null expressions.
2012-11-04 01:41:11 +01:00
class PENull : public PExpr {
public:
explicit PENull();
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PENull() override;
Stub to pform class properties and null expressions.
2012-11-04 01:41:11 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Handle null objects in general.
2012-11-22 02:48:46 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Elaborate class_new and (null) expressions This gets the types right for class_new and null expressions, and elaborate them down to the ivl_target.h API.
2012-11-12 02:42:31 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Stub to pform class properties and null expressions.
2012-11-04 01:41:11 +01:00
};
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
class PENumber : public PExpr {
public:
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
explicit PENumber(verinum*vp);
More cppcheck updates
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~PENumber() override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Named events really should be expressed with PEIdent objects in the pform, Handle named events within the mix of net events and edges. As a unified lot they get caught together. wait statements are broken into more complex statements that include a conditional. Do not generate NetPEvent or NetNEvent objects in elaboration. NetEvent, NetEvWait and NetEvProbe take over those functions in the netlist.
2000-04-12 06:23:57 +02:00
const verinum& value() const;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Remove last bits of relax_width methods, and use test_width to calculate the width of an r-value expression that may contain unsized numbers.
2006-11-04 07:19:24 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
Handle number literals as real-valued r-values.
2013-10-19 05:05:26 +02:00
virtual NetExpr *elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Detect missing indices to memories (PR#421)
2002-04-13 04:33:17 +02:00
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid, unsigned) const override;
Unify elaboration of l-values for all proceedural assignments, including assing, cassign and force. Generate NetConcat devices for gate outputs that feed into a vector results. Use this to hande gate arrays. Also let gate arrays handle vectors of gates when the outputs allow for it.
2004-12-30 00:55:43 +01:00
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
Handle out-of range and undefined LHS word indices in assignments. For constant word indices, issue a warning if the index is out of range or an undefined value. In any case, the RHS value should be discarded, and the actual assignment should be skipped.
2013-05-18 20:21:37 +02:00
bool is_cassign,
Add support for `const` variables SystemVerilog allows to declare const variables. These variables are read-only and can not be assigned a value after their declaration. It is only possible to assign an initial value as an initializer. E.g. ``` const int x = 10; x = 20; // Error ``` The LRM requires that for variable declarations with static storage the initializer is a constant expression with the extension that other const variables are also allowed. const variables with automatic storage can be initialized by any expression. Checking if an expression contains only const variables requires a bit more work to implement. So for now be more lenient that what the standard requires and allow arbitrary expressions to initialize const variables even for those with static storage. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-01-03 21:24:23 +01:00
bool is_force,
More cppcheck updates
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bool is_init = false) const override;
Constant expressions are not l-values for task ports.
2002-03-09 05:02:26 +01:00
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
private:
verinum*const value_;
};
Support elaborate_net for PEString objects.
2001-12-30 22:32:03 +01:00
/*
* This represents a string constant in an expression.
*
* The s parameter to the PEString constructor is a C string that this
* class instance will take for its own. The caller should not delete
* the string, the destructor will do it.
*/
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
class PEString : public PExpr {
public:
Support elaborate_net for PEString objects.
2001-12-30 22:32:03 +01:00
explicit PEString(char*s);
More cppcheck updates
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~PEString() override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Remove "using namespace std" from compiler header files and fix the fallout.
2021-11-04 17:12:04 +01:00
std::string value() const;
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
Add test_width methods for PETernary and PEString.
2006-11-10 05:54:26 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Add test_width methods for PETernary and PEString.
2006-11-10 05:54:26 +01:00
Handle initialized darray of strings This includes adding support for returning strings from functions, adding initializing new darray with array_pattern strings, and assigning an array_pattern of strings to a preallocated darray. Also fix up support for initializing array with simple string expression.
2013-10-20 00:11:13 +02:00
virtual NetEConst*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Handle initialized darray of strings This includes adding support for returning strings from functions, adding initializing new darray with array_pattern strings, and assigning an array_pattern of strings to a preallocated darray. Also fix up support for initializing array with simple string expression.
2013-10-20 00:11:13 +02:00
Detect missing indices to memories (PR#421)
2002-04-13 04:33:17 +02:00
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid, unsigned) const override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
private:
Support elaborate_net for PEString objects.
2001-12-30 22:32:03 +01:00
char*text_;
Type name expressions down to elaboration.
2013-12-16 02:49:57 +01:00
};
class PETypename : public PExpr {
public:
explicit PETypename(data_type_t*data_type);
More cppcheck updates
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~PETypename() override;
Type name expressions down to elaboration.
2013-12-16 02:49:57 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&) const override;
Type name expressions down to elaboration.
2013-12-16 02:49:57 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Type name expressions down to elaboration.
2013-12-16 02:49:57 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
Type name expressions down to elaboration.
2013-12-16 02:49:57 +01:00
Implement $bits(type) to get the size of a type In the process, I implemented a means to get at previously elaborated types from the pform type pointer.
2013-12-16 03:36:13 +01:00
inline data_type_t* get_type() const { return data_type_; }
Type name expressions down to elaboration.
2013-12-16 02:49:57 +01:00
private:
data_type_t*data_type_;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
};
class PEUnary : public PExpr {
public:
Allow unary operators in constant expressions.
2000-06-30 17:50:20 +02:00
explicit PEUnary(char op, PExpr*ex);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEUnary() override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&out) const override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void declare_implicit_nets(LexicalScope*scope, NetNet::Type type) override;
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design*des, NetScope*scope) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
Real valued nets are signed, and pform unary expression have width. Real valued nets should ne treated as signed no matter what. Also, PEUnary nary expressions need a useful test_width method.
2008-08-16 07:03:19 +02:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Real valued nets are signed, and pform unary expression have width. Real valued nets should ne treated as signed no matter what. Also, PEUnary nary expressions need a useful test_width method.
2008-08-16 07:03:19 +02:00
Precalculate unary - if possible.
2002-04-14 05:55:25 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Implement increment/decrement statements. During parse/pform processing, convert increment statements to the equivalent compressed assignment statement. This is less weird for elaboration processing and better expresses what is going on.
2012-02-20 03:54:58 +01:00
public:
inline char get_op() const { return op_; }
inline PExpr*get_expr() const { return expr_; }
Pad the subexpression of unary not. The operand of unary not needs to be padded to the expression width before the operator itself. Otherwise, the high (pad) bits will come out wrong.
2008-10-13 06:38:07 +02:00
private:
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetExpr* elaborate_expr_bits_(NetExpr*operand, unsigned expr_wid) const;
Pad the subexpression of unary not. The operand of unary not needs to be padded to the expression width before the operator itself. Otherwise, the high (pad) bits will come out wrong.
2008-10-13 06:38:07 +02:00
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
private:
char op_;
PExpr*expr_;
};
class PEBinary : public PExpr {
public:
Support more real arithmetic in delay constants.
2001-11-06 07:11:55 +01:00
explicit PEBinary(char op, PExpr*l, PExpr*r);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEBinary() override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&out) const override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void declare_implicit_nets(LexicalScope*scope, NetNet::Type type) override;
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design*des, NetScope*scope) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
Remove last bits of relax_width methods, and use test_width to calculate the width of an r-value expression that may contain unsized numbers.
2006-11-04 07:19:24 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
Fix left shift of unsized constants in sef-determined context. When left-shifting unsized constants in self-determined contexts, the constant value is normally pared down to its minimum required width. But this practically guarantees loss of bits. Instead, detect this special case and give the unsized constant a width of an integer. Still allow for the super-special case that the shifted value and the shift amount are constants. In that case, the result width (and value) can be calculated precisely and there is no need to resort to default widths.
2008-04-22 20:23:24 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
protected:
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
char op_;
PExpr*left_;
PExpr*right_;
Include subtraction in LPM_ADD_SUB device.
1999-10-31 21:08:24 +01:00
Fix the signed-ness calculations of +- in parameter expressions. This fixes up the elaboration of binary expressions found in parameter expressions. Parameter expressions are special because they elaborate early, before all the other parameters are necessarily completed.
2008-12-19 06:33:31 +01:00
NetExpr*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const;
Fix the signed-ness calculations of +- in parameter expressions. This fixes up the elaboration of binary expressions found in parameter expressions. Parameter expressions are special because they elaborate early, before all the other parameters are necessarily completed.
2008-12-19 06:33:31 +01:00
NetExpr*elaborate_eval_expr_base_(Design*, NetExpr*lp, NetExpr*rp,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const;
Binary and unary operators in parameter expressions.
2000-03-12 19:22:11 +01:00
Cleanup after parameter expression rework. This patch removes some code made redundant by the rework of parameter expression evaluation. It also documents the new -g option.
2010-12-05 23:35:30 +01:00
NetExpr*elaborate_expr_base_bits_(Design*, NetExpr*lp, NetExpr*rp,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const;
Fix the signed-ness calculations of +- in parameter expressions. This fixes up the elaboration of binary expressions found in parameter expressions. Parameter expressions are special because they elaborate early, before all the other parameters are necessarily completed.
2008-12-19 06:33:31 +01:00
NetExpr*elaborate_expr_base_div_(Design*, NetExpr*lp, NetExpr*rp,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const;
Fix the signed-ness calculations of +- in parameter expressions. This fixes up the elaboration of binary expressions found in parameter expressions. Parameter expressions are special because they elaborate early, before all the other parameters are necessarily completed.
2008-12-19 06:33:31 +01:00
NetExpr*elaborate_expr_base_mult_(Design*, NetExpr*lp, NetExpr*rp,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const;
Fix the signed-ness calculations of +- in parameter expressions. This fixes up the elaboration of binary expressions found in parameter expressions. Parameter expressions are special because they elaborate early, before all the other parameters are necessarily completed.
2008-12-19 06:33:31 +01:00
NetExpr*elaborate_expr_base_add_(Design*, NetExpr*lp, NetExpr*rp,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const;
Process shift by constant amounts early in expression elaboration. The expr:::synthesize methods need not deal with saturating left or right shifts if they are dealt with early, in elaborate_expr methods. So the elaborate_expr for shift takes on much more responsibility.
2008-08-21 06:47:07 +02:00
Introduce verilog to CVS.
1998-11-04 00:28:49 +01:00
};
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
/*
Spelling fixes mostly comments, but includes some identifiers and message text
2008-01-25 22:34:51 +01:00
* Here are a few specialized classes for handling specific binary
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
* operators.
*/
class PEBComp : public PEBinary {
public:
explicit PEBComp(char op, PExpr*l, PExpr*r);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEBComp() override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
Elaborate logical and/or to account for special properties. The arguments of logical and/or are self determined, and the width is fixed as 1 bit. Account for this special behavior by creating the PEBLogic class.
2008-10-30 04:31:26 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Elaborate logical and/or to account for special properties. The arguments of logical and/or are self determined, and the width is fixed as 1 bit. Account for this special behavior by creating the PEBLogic class.
2008-10-30 04:31:26 +01:00
NetExpr* elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid, unsigned flags) const override;
Account for unsized arguments to comparisons. Comparison expressions have sorta-self-determined arguments. Handle the special cause that some of the arguments may be themselves unsized, and so expecting to be even wider then otherwise.
2010-04-27 20:55:59 +02:00
private:
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned l_width_;
unsigned r_width_;
Elaborate logical and/or to account for special properties. The arguments of logical and/or are self determined, and the width is fixed as 1 bit. Account for this special behavior by creating the PEBLogic class.
2008-10-30 04:31:26 +01:00
};
/*
* This derived class is for handling logical expressions: && and ||.
*/
class PEBLogic : public PEBinary {
public:
explicit PEBLogic(char op, PExpr*l, PExpr*r);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEBLogic() override;
Elaborate logical and/or to account for special properties. The arguments of logical and/or are self determined, and the width is fixed as 1 bit. Account for this special behavior by creating the PEBLogic class.
2008-10-30 04:31:26 +01:00
Remove last bits of relax_width methods, and use test_width to calculate the width of an r-value expression that may contain unsized numbers.
2006-11-04 07:19:24 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
Fix left shift of unsized constants in sef-determined context. When left-shifting unsized constants in self-determined contexts, the constant value is normally pared down to its minimum required width. But this practically guarantees loss of bits. Instead, detect this special case and give the unsized constant a width of an integer. Still allow for the super-special case that the shifted value and the shift amount are constants. In that case, the result width (and value) can be calculated precisely and there is no need to resort to default widths.
2008-04-22 20:23:24 +02:00
NetExpr* elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
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unsigned expr_wid, unsigned flags) const override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
};
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
/*
* A couple of the binary operands have a special sub-expression rule
* where the expression width is carried entirely by the left
* expression, and the right operand is self-determined.
*/
class PEBLeftWidth : public PEBinary {
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
public:
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
explicit PEBLeftWidth(char op, PExpr*l, PExpr*r);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEBLeftWidth() override =0;
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
virtual NetExpr*elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid) const =0;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
protected:
Remove last bits of relax_width methods, and use test_width to calculate the width of an r-value expression that may contain unsized numbers.
2006-11-04 07:19:24 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
};
class PEBPower : public PEBLeftWidth {
public:
explicit PEBPower(char op, PExpr*l, PExpr*r);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEBPower() override;
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
NetExpr*elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid) const override;
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
};
class PEBShift : public PEBLeftWidth {
public:
explicit PEBShift(char op, PExpr*l, PExpr*r);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEBShift() override;
Rework shift and power PExpr nodes for their special needs. The power (**) and shift operators are different from other binary operators because their expression width calculations rely only on their left operand, with their right operand self-determined. Get the handling of these operators out of the PEBinary base class to prevent confusion.
2008-11-28 23:40:25 +01:00
NetExpr*elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid) const override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
};
Add support for the Ternary operator, Add support for repeat concatenation, Correct some seg faults cause by elaboration errors, Parse the casex anc casez statements.
1999-06-10 06:03:52 +02:00
/*
* This class supports the ternary (?:) operator. The operator takes
* three expressions, the test, the true result and the false result.
*/
class PETernary : public PExpr {
public:
netlist support for ternary operator.
1999-07-17 21:50:59 +02:00
explicit PETernary(PExpr*e, PExpr*t, PExpr*f);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PETernary() override;
Add support for the Ternary operator, Add support for repeat concatenation, Correct some seg faults cause by elaboration errors, Parse the casex anc casez statements.
1999-06-10 06:03:52 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream&out) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void declare_implicit_nets(LexicalScope*scope, NetNet::Type type) override;
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design*des, NetScope*scope) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
Add test_width methods for PETernary and PEString.
2006-11-10 05:54:26 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Add test_width methods for PETernary and PEString.
2006-11-10 05:54:26 +01:00
Short-circuit elaboration of ternary expressions. When the condition expression of a ternary is constant 1 or 0, we can short-circuit the elaboration by only processing the clause (true or false) that we need. This saves compile time and execution time.
2008-08-23 19:50:24 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
netlist support for ternary operator.
1999-07-17 21:50:59 +02:00
Handle ternary expressions with mixed argument types. If the true and false alternatives are mixed types, then vectored arguments are treated as if in a self-determined context then cast to REAL.
2009-01-06 04:44:52 +01:00
private:
NetExpr* elab_and_eval_alternative_(Design*des, NetScope*scope,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
PExpr*expr, unsigned expr_wid,
Handle implicit cast when short-circuiting ternary expression. If a ternary expression with mixed logic and real operands is short-circuited and the logic value is selected, that value should be cast to a real value.
2013-03-02 00:01:15 +01:00
unsigned flags, bool short_cct) const;
Handle ternary expressions with mixed argument types. If the true and false alternatives are mixed types, then vectored arguments are treated as if in a self-determined context then cast to REAL.
2009-01-06 04:44:52 +01:00
Add support for the Ternary operator, Add support for repeat concatenation, Correct some seg faults cause by elaboration errors, Parse the casex anc casez statements.
1999-06-10 06:03:52 +02:00
private:
PExpr*expr_;
PExpr*tru_;
PExpr*fal_;
};
Parse system function calls.
1999-09-25 04:57:29 +02:00
/*
Add infrastructure for system functions, move $time to that structure and add $random.
2000-05-04 05:37:58 +02:00
* This class represents a parsed call to a function, including calls
Add the NetUserFunc netlist node.
2002-03-09 03:10:22 +01:00
* to system functions. The parameters in the parms list are the
* expressions that are passed as input to the ports of the function.
Parse system function calls.
1999-09-25 04:57:29 +02:00
*/
Add functions up to elaboration (Ed Carter)
1999-07-31 21:14:47 +02:00
class PECallFunction : public PExpr {
Parse system function calls.
1999-09-25 04:57:29 +02:00
public:
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
explicit PECallFunction(const pform_name_t &n, const std::vector<named_pexpr_t> &parms);
Parse more package items Rework lexical support for PACKAGE_IDENTIFIER so that the lexor can help with package scoped identifiers. Pform package types and package functions up to elaboration.
2013-04-01 00:46:36 +02:00
// Call function defined in package.
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
explicit PECallFunction(PPackage *pkg, const pform_name_t &n, const std::list<named_pexpr_t> &parms);
Parse more package items Rework lexical support for PACKAGE_IDENTIFIER so that the lexor can help with package scoped identifiers. Pform package types and package functions up to elaboration.
2013-04-01 00:46:36 +02:00
Add support for calling a user functions as a task (SV)
2013-07-25 04:36:11 +02:00
// Used to convert a user function called as a task
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
explicit PECallFunction(PPackage *pkg, const pform_name_t &n, const std::vector<named_pexpr_t> &parms);
Add support for calling a user functions as a task (SV)
2013-07-25 04:36:11 +02:00
Spelling fixes mostly comments, but includes some identifiers and message text
2008-01-25 22:34:51 +01:00
// Call of system function (name is not hierarchical)
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
explicit PECallFunction(perm_string n, const std::vector<named_pexpr_t> &parms);
Rework the heirarchical identifier parse syntax and pform to handle more general combinations of heirarch and bit selects.
2007-05-24 06:07:11 +02:00
explicit PECallFunction(perm_string n);
Parse contribution statements as far as pform. Contribution statements have an l-value and r-value. Parse those expressions into pform so that elaboration has something to work with. In this process, this patch also changes the PECallFunction class to use the vector template instead of the svector template. The latter doesn't add anything over the STL vector template, so this is a start of working the svector out.
2008-07-27 23:22:19 +02:00
Parse more package items Rework lexical support for PACKAGE_IDENTIFIER so that the lexor can help with package scoped identifiers. Pform package types and package functions up to elaboration.
2013-04-01 00:46:36 +02:00
// std::list versions. Should be removed!
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
explicit PECallFunction(const pform_name_t &n, const std::list<named_pexpr_t> &parms);
explicit PECallFunction(perm_string n, const std::list<named_pexpr_t> &parms);
Parse contribution statements as far as pform. Contribution statements have an l-value and r-value. Parse those expressions into pform so that elaboration has something to work with. In this process, this patch also changes the PECallFunction class to use the vector template instead of the svector template. The latter doesn't add anything over the STL vector template, so this is a start of working the svector out.
2008-07-27 23:22:19 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PECallFunction() override;
Add functions up to elaboration (Ed Carter)
1999-07-31 21:14:47 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void dump(std::ostream &) const override;
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 06:44:49 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual void declare_implicit_nets(LexicalScope*scope, NetNet::Type type) override;
Fix for pr2924354. Creation of implicit nets requires knowledge of whether an identifier has been declared before it is used. Currently implicit nets are created during elaboration, but by this stage the order of declaration and use is not known. This patch moves the creation of implicit nets into the parser stage.
2010-01-12 21:11:01 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design*des, NetScope*scope) const override;
Checks for illegal use of automatically allocated variables. This patch adds a number of compile and run-time checks for illegal uses of variables declared in automatic tasks and functions. It also adds a check for event expressions in automatic tasks that use features not yet supported in VVP.
2008-11-09 01:26:55 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
ivl: Functions may return dynamic arrays.
2014-12-18 17:38:34 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid, unsigned flags) const override;
Add functions up to elaboration (Ed Carter)
1999-07-31 21:14:47 +02:00
test_width method for functions in expressions In expressions, user defined functions have a clearly defined width and the test_width expression needs to express that. Note that the $signed/$unsigned functions are special and magical. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-02 05:38:20 +02:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
test_width method for functions in expressions In expressions, user defined functions have a clearly defined width and the test_width expression needs to express that. Note that the $signed/$unsigned functions are special and magical. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-02 05:38:20 +02:00
Parse system function calls.
1999-09-25 04:57:29 +02:00
private:
Add common implementation for scoped symbol search In SystemVerilog identifiers can usually have an additional package scope in which they should be resolved. At the moment there are many places in the code base that handle the resolution of the package scope. Add a common data type for package scoped paths as well as a symbol_search() variant that works on package scoped identifiers. This allows to handle package scope resolution in a central place. Having the code in a central place makes it easier to ensure consistent and correct behavior. E.g. there are currently some corner case bugs that are common to all implementations. With the common implementation it only has to be fixed in one place. It will also make it easier to eventually implement class scoped identifiers. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-09-25 10:39:41 +02:00
pform_scoped_name_t path_;
Add support for binding function/task arguments by name In addition to providing positional arguments for task and functions SystemVerilog allows to bind arguments by name. This is similar to how module ports can be bound by name. ``` task t(int a, int b); ... endtask ... t(.b(1), .a(2)); ``` Extend the parser and elaboration stage to be able to handle this. During elaboration the named argument list is transformed into a purely positional list so that later stages like synthesis do not have to care about the names. For system functions and tasks all arguments must be unnamed, otherwise an error will be reported. In addition to functions and tasks arguments can also be bound by name for the various different ways of invoking a class constructor. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-01-07 04:13:29 +01:00
std::vector<named_pexpr_t> parms_;
Parse system function calls.
1999-09-25 04:57:29 +02:00
Don't evaluate built-in system functions if they are overridden. We don't support evaluating user-defined system functions at compile time. If possible, defer evaluation until run time. If used in a constant expression, output a "sorry" message.
2019-10-19 17:12:17 +02:00
// For system functions.
bool is_overridden_;
Add the NetUserFunc netlist node.
2002-03-09 03:10:22 +01:00
bool check_call_matches_definition_(Design*des, NetScope*dscope) const;
Detect and implement string.len() method, and string[index] expressions Implement the string.len() method in the system.vpi, and implement the string[index] method in vvp.
2012-07-01 02:05:25 +02:00
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetExpr* cast_to_width_(NetExpr*expr, unsigned wid) const;
Fix for pr2922063. When handling the $signed/$unsigned system functions, the compiler was applying the new signed/unsigned property to the NetExpr object representing the input argument. This caused the input argument to be evaluated incorrectly. This patch fixes this by applying the new property to the NetExpr object created to pad the result to the required size. In testing this fix, it was also discovered that the width of the input argument expression was not being calculated correctly. This patch also fixes this issue.
2010-01-17 15:20:18 +01:00
Handle context signedness and width expansion for method return types The signedness of an expression can change depending on its context. E.g. for an arithmetic operation with one unsigned operand all operands are treated as unsigned. For methods, both on built-in SystemVerilog types as well as user defined classes, this is currently not considered. This can lead to incorrect behavior if the value is sign extended. E.g. the following will print 4294967295 rather than 65535. ``` shortint q[$]; q.push_back(-1); $display(q.pop_front() + 32'h0); ``` Furthermore the return value is not expanded to the width of its context. This can cause vvp to crash with an exception when it expects a vector on the stack to have a certain width. E.g. ``` int d[]; longint x; bit a = 1'b1; x = a ? d.size() : 64'h0; ``` Solve both of this by using `pad_to_width()` on the method return value if it is a vectorable type. Since any function call, not just methods, needs to have this done to its return value insert this on the common path. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-11 10:38:00 +02:00
NetExpr* elaborate_expr_(Design *des, NetScope *scope,
unsigned flags) const;
Rework symbol_search function. There are too many ad hoc handlers of symbol_search partial results. Rewrite symbol_search to clean up things like partial results and member/method detections. Use this reworked symbol_search function to rewrite expression elaborate for the PECallFunction expressions.
2020-12-31 22:04:56 +01:00
NetExpr* elaborate_expr_method_(Design*des, NetScope*scope,
Handle context signedness and width expansion for method return types The signedness of an expression can change depending on its context. E.g. for an arithmetic operation with one unsigned operand all operands are treated as unsigned. For methods, both on built-in SystemVerilog types as well as user defined classes, this is currently not considered. This can lead to incorrect behavior if the value is sign extended. E.g. the following will print 4294967295 rather than 65535. ``` shortint q[$]; q.push_back(-1); $display(q.pop_front() + 32'h0); ``` Furthermore the return value is not expanded to the width of its context. This can cause vvp to crash with an exception when it expects a vector on the stack to have a certain width. E.g. ``` int d[]; longint x; bit a = 1'b1; x = a ? d.size() : 64'h0; ``` Solve both of this by using `pad_to_width()` on the method return value if it is a vectorable type. Since any function call, not just methods, needs to have this done to its return value insert this on the common path. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-11 10:38:00 +02:00
symbol_search_results&search_results)
const;
Rework symbol_search function. There are too many ad hoc handlers of symbol_search partial results. Rewrite symbol_search to clean up things like partial results and member/method detections. Use this reworked symbol_search function to rewrite expression elaborate for the PECallFunction expressions.
2020-12-31 22:04:56 +01:00
NetExpr* elaborate_expr_method_par_(Design*des, NetScope*scope,
Handle context signedness and width expansion for method return types The signedness of an expression can change depending on its context. E.g. for an arithmetic operation with one unsigned operand all operands are treated as unsigned. For methods, both on built-in SystemVerilog types as well as user defined classes, this is currently not considered. This can lead to incorrect behavior if the value is sign extended. E.g. the following will print 4294967295 rather than 65535. ``` shortint q[$]; q.push_back(-1); $display(q.pop_front() + 32'h0); ``` Furthermore the return value is not expanded to the width of its context. This can cause vvp to crash with an exception when it expects a vector on the stack to have a certain width. E.g. ``` int d[]; longint x; bit a = 1'b1; x = a ? d.size() : 64'h0; ``` Solve both of this by using `pad_to_width()` on the method return value if it is a vectorable type. Since any function call, not just methods, needs to have this done to its return value insert this on the common path. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-11 10:38:00 +02:00
symbol_search_results&search_results)
const;
Add support for string parameters Parameters can have string type and do the usual string stuff, and also implement some of the string methods on string parameters so that they evaluate down to constants.
2020-12-28 03:53:34 +01:00
Detect and implement string.len() method, and string[index] expressions Implement the string.len() method in the system.vpi, and implement the string[index] method in vvp.
2012-07-01 02:05:25 +02:00
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
NetExpr* elaborate_sfunc_(Design*des, NetScope*scope,
Rework of constant expression error reporting. This patch changes the method used to signal that a constant expression is being elaborated from flags stored in global variables to flags passed down the call chain. It also generates more informative error messages when variable references are found in a constant expression.
2011-03-27 12:08:33 +02:00
unsigned expr_wid,
unsigned flags) const;
Handle context signedness and width expansion for method return types The signedness of an expression can change depending on its context. E.g. for an arithmetic operation with one unsigned operand all operands are treated as unsigned. For methods, both on built-in SystemVerilog types as well as user defined classes, this is currently not considered. This can lead to incorrect behavior if the value is sign extended. E.g. the following will print 4294967295 rather than 65535. ``` shortint q[$]; q.push_back(-1); $display(q.pop_front() + 32'h0); ``` Furthermore the return value is not expanded to the width of its context. This can cause vvp to crash with an exception when it expects a vector on the stack to have a certain width. E.g. ``` int d[]; longint x; bit a = 1'b1; x = a ? d.size() : 64'h0; ``` Solve both of this by using `pad_to_width()` on the method return value if it is a vectorable type. Since any function call, not just methods, needs to have this done to its return value insert this on the common path. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-11 10:38:00 +02:00
NetExpr* elaborate_access_func_(Design*des, NetScope*scope, ivl_nature_t)
const;
test_width method for functions in expressions In expressions, user defined functions have a clearly defined width and the test_width expression needs to express that. Note that the $signed/$unsigned functions are special and magical. Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-02 05:38:20 +02:00
unsigned test_width_sfunc_(Design*des, NetScope*scope,
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
width_mode_t&mode);
Parse support for dynamic arrays. This includes limited support for dynamic arrays down to the code generator, and some stubs in the vvp code generator and vvp run time.
2012-07-14 03:41:41 +02:00
unsigned test_width_method_(Design*des, NetScope*scope,
Rework symbol_search function. There are too many ad hoc handlers of symbol_search partial results. Rewrite symbol_search to clean up things like partial results and member/method detections. Use this reworked symbol_search function to rewrite expression elaborate for the PECallFunction expressions.
2020-12-31 22:04:56 +01:00
symbol_search_results&search_results,
Parse support for dynamic arrays. This includes limited support for dynamic arrays down to the code generator, and some stubs in the vvp code generator and vvp run time.
2012-07-14 03:41:41 +02:00
width_mode_t&mode);
Support member functions with arguments.
2013-03-24 19:59:33 +01:00
Elaborate parameters, tasks and functions in packages. Get the elaboration to happen all the way to the ivl_target interface.
2013-04-07 02:38:36 +02:00
NetExpr*elaborate_base_(Design*des, NetScope*scope, NetScope*dscope,
Handle context signedness and width expansion for method return types The signedness of an expression can change depending on its context. E.g. for an arithmetic operation with one unsigned operand all operands are treated as unsigned. For methods, both on built-in SystemVerilog types as well as user defined classes, this is currently not considered. This can lead to incorrect behavior if the value is sign extended. E.g. the following will print 4294967295 rather than 65535. ``` shortint q[$]; q.push_back(-1); $display(q.pop_front() + 32'h0); ``` Furthermore the return value is not expanded to the width of its context. This can cause vvp to crash with an exception when it expects a vector on the stack to have a certain width. E.g. ``` int d[]; longint x; bit a = 1'b1; x = a ? d.size() : 64'h0; ``` Solve both of this by using `pad_to_width()` on the method return value if it is a vectorable type. Since any function call, not just methods, needs to have this done to its return value insert this on the common path. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-04-11 10:38:00 +02:00
unsigned flags) const;
Elaborate parameters, tasks and functions in packages. Get the elaboration to happen all the way to the ivl_target interface.
2013-04-07 02:38:36 +02:00
Support member functions with arguments.
2013-03-24 19:59:33 +01:00
unsigned elaborate_arguments_(Design*des, NetScope*scope,
NetFuncDef*def, bool need_const,
std::vector<NetExpr*>&parms,
unsigned parm_off) const;
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
};
Support SystemVerilog size cast.
2011-09-19 04:21:46 +02:00
/*
* Support the SystemVerilog cast to size.
*/
class PECastSize : public PExpr {
public:
Fix for GitHub issue #94 - enhance support for SystemVerilog size casting. Allow the size expression to be any constant expression. Also ensure that the expression width and type are correctly calculated and applied.
2016-03-25 22:46:04 +01:00
explicit PECastSize(PExpr*size, PExpr*base);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PECastSize() override;
Support SystemVerilog size cast.
2011-09-19 04:21:46 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
void dump(std::ostream &out) const override;
Support SystemVerilog size cast.
2011-09-19 04:21:46 +02:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Support SystemVerilog size cast.
2011-09-19 04:21:46 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design *des, NetScope *scope) const override;
Implement `has_aa_term()` for cast expressions If the base expression of a cast expression has an automatic term then the cast expression itself has an automatic term. Make sure this is implemented so that an error is properly reported when using such an expression in a context where automatic variables are not allowed. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-10-01 23:50:23 +02:00
Support SystemVerilog size cast.
2011-09-19 04:21:46 +02:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
Support SystemVerilog size cast.
2011-09-19 04:21:46 +02:00
private:
Fix for GitHub issue #94 - enhance support for SystemVerilog size casting. Allow the size expression to be any constant expression. Also ensure that the expression width and type are correctly calculated and applied.
2016-03-25 22:46:04 +01:00
PExpr* size_;
Support SystemVerilog size cast.
2011-09-19 04:21:46 +02:00
PExpr* base_;
};
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
/*
* Support the SystemVerilog cast to a different type.
*/
class PECastType : public PExpr {
public:
explicit PECastType(data_type_t*target, PExpr*base);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PECastType() override;
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
void dump(std::ostream &out) const override;
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
ivl: Casting vectors to dynamic arrays.
2015-01-21 10:03:20 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
ivl_type_t type, unsigned flags) const override;
ivl: Casting vectors to dynamic arrays.
2015-01-21 10:03:20 +01:00
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid, unsigned flags) const override;
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design *des, NetScope *scope) const override;
Implement `has_aa_term()` for cast expressions If the base expression of a cast expression has an automatic term then the cast expression itself has an automatic term. Make sure this is implemented so that an error is properly reported when using such an expression in a context where automatic variables are not allowed. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-10-01 23:50:23 +02:00
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
virtual unsigned test_width(Design*des, NetScope*scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
width_mode_t&mode) override;
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
private:
data_type_t* target_;
Add support for explicit cast to packed struct and packed array Currently explicit cast is supported to atom2 and vector types. packed struct, packed array and enum are not supported. An explicit cast to packed type works the same for all packed types though. Add support for handling also packed structs, packed arrays and enums by make the code more generic and querying the packed base type from the ivl_type_t. To correctly handle enums a bit more work is necessary, which will be done in a follow up patch. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-01-15 23:09:19 +01:00
ivl_type_t target_type_;
ivl: Added PECastType to handle type casting.
2014-10-31 09:55:36 +01:00
PExpr* base_;
};
Add support for SystemVerilog sign cast SystemVerilog supports sign cast where it is possible to change the signedness of an expression. Syntactical it is similar to width or type casting, except that the keywords 'signed' or 'unsigned' are used in front of the cast operator. E.g. ``` logic [3:0] a = 4'b1000; logic [7:0] b = signed'(a); // b is 8'b11111000; logic signed [3:0] c = 4'b1000; logic signed [7:0] d = unsigned'(c); // d is 8'b00001000; ``` As noted by the LRM section 6.24.1 ("Cast operator") applying a sign cast to an expression is equivalent to calling the $signed() and $unsigned() system functions on the expression. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2020-10-04 17:49:23 +02:00
/*
* Support the SystemVerilog sign cast.
*/
class PECastSign : public PExpr {
public:
explicit PECastSign(bool signed_flag, PExpr *base);
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PECastSign() override = default;
Add support for SystemVerilog sign cast SystemVerilog supports sign cast where it is possible to change the signedness of an expression. Syntactical it is similar to width or type casting, except that the keywords 'signed' or 'unsigned' are used in front of the cast operator. E.g. ``` logic [3:0] a = 4'b1000; logic [7:0] b = signed'(a); // b is 8'b11111000; logic signed [3:0] c = 4'b1000; logic signed [7:0] d = unsigned'(c); // d is 8'b00001000; ``` As noted by the LRM section 6.24.1 ("Cast operator") applying a sign cast to an expression is equivalent to calling the $signed() and $unsigned() system functions on the expression. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2020-10-04 17:49:23 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
void dump(std::ostream &out) const override;
Add support for SystemVerilog sign cast SystemVerilog supports sign cast where it is possible to change the signedness of an expression. Syntactical it is similar to width or type casting, except that the keywords 'signed' or 'unsigned' are used in front of the cast operator. E.g. ``` logic [3:0] a = 4'b1000; logic [7:0] b = signed'(a); // b is 8'b11111000; logic signed [3:0] c = 4'b1000; logic signed [7:0] d = unsigned'(c); // d is 8'b00001000; ``` As noted by the LRM section 6.24.1 ("Cast operator") applying a sign cast to an expression is equivalent to calling the $signed() and $unsigned() system functions on the expression. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2020-10-04 17:49:23 +02:00
NetExpr* elaborate_expr(Design *des, NetScope *scope,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned expr_wid, unsigned flags) const override;
Add support for SystemVerilog sign cast SystemVerilog supports sign cast where it is possible to change the signedness of an expression. Syntactical it is similar to width or type casting, except that the keywords 'signed' or 'unsigned' are used in front of the cast operator. E.g. ``` logic [3:0] a = 4'b1000; logic [7:0] b = signed'(a); // b is 8'b11111000; logic signed [3:0] c = 4'b1000; logic signed [7:0] d = unsigned'(c); // d is 8'b00001000; ``` As noted by the LRM section 6.24.1 ("Cast operator") applying a sign cast to an expression is equivalent to calling the $signed() and $unsigned() system functions on the expression. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2020-10-04 17:49:23 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
virtual bool has_aa_term(Design *des, NetScope *scope) const override;
Implement `has_aa_term()` for cast expressions If the base expression of a cast expression has an automatic term then the cast expression itself has an automatic term. Make sure this is implemented so that an error is properly reported when using such an expression in a context where automatic variables are not allowed. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2022-10-01 23:50:23 +02:00
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned test_width(Design *des, NetScope *scope, width_mode_t &mode) override;
Add support for SystemVerilog sign cast SystemVerilog supports sign cast where it is possible to change the signedness of an expression. Syntactical it is similar to width or type casting, except that the keywords 'signed' or 'unsigned' are used in front of the cast operator. E.g. ``` logic [3:0] a = 4'b1000; logic [7:0] b = signed'(a); // b is 8'b11111000; logic signed [3:0] c = 4'b1000; logic signed [7:0] d = unsigned'(c); // d is 8'b00001000; ``` As noted by the LRM section 6.24.1 ("Cast operator") applying a sign cast to an expression is equivalent to calling the $signed() and $unsigned() system functions on the expression. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2020-10-04 17:49:23 +02:00
private:
std::unique_ptr<PExpr> base_;
};
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
/*
* This class is used for error recovery. All methods do nothing and return
* null or default values.
*/
class PEVoid : public PExpr {
public:
explicit PEVoid();
More cppcheck updates
2025-10-13 22:14:57 +02:00
~PEVoid() override;
Expression width rework. This patch is a major rework of expression elaboration and evaluation in the compiler, aimed at better compliance with the IEEE standard.
2011-02-26 23:59:52 +01:00
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
unsigned expr_wid,
More cppcheck updates
2025-10-13 22:14:57 +02:00
unsigned flags) const override;
Add functions up to elaboration (Ed Carter)
1999-07-31 21:14:47 +02:00
};
Update header files to use a more standard name to prevent rereading This is from github report #16. There are likely a few more issues that need to be addressed though this takes care of the major ones.
2014-07-23 22:39:29 +02:00
#endif /* IVL_PExpr_H */