icestorm

mirror of https://github.com/YosysHQ/icestorm.git synced 2026-09-03 08:33:43 +02:00

Files

T

Tim Ansell 69d32b129b Update README to be clearer

The example doesn't work out of the box with the iCEblink40-lp1k board.

2018-07-03 13:19:58 -07:00

.gitignore

Timing models for LP and HX devices

2016-02-01 23:32:03 +01:00

example.v

Some cleanups in verilog examples

2017-01-09 21:21:15 +01:00

iceblink.pcf

Fixed files with CRLF line endings

2017-01-01 22:12:32 +01:00

Makefile

Add missing .rpt file to iceblink example "make clean"

2017-04-23 16:00:41 +02:00

README

Update README to be clearer

2018-07-03 13:19:58 -07:00

README

Note, there are at least two similar looking versions of the iCEblink40 evaluation board:
-iCEblink40-HX1K
-iCEblink40-LP1K

This example assumes the iCEblink40-HX1K board. 
The iCEblink40-LP1K is *not* compatible with this example without modification.

The iCEblink40 boards have an on-board programmer with USB interface from Digilent.
You need iCEburn to program the FPGA via this interface (or the original vendor
tools).
https://github.com/davidcarne/iceBurn