Commit Graph
240 Commits
Author SHA1 Message Date
Alan Mishchenko b2b93858ee Compiler warnings. 2012-08-29 17:14:02 -07:00
Alan Mishchenko 4c5bfbe73f Forgot to update makefile. 2012-08-29 17:02:31 -07:00
Alan Mishchenko 83bfe0b1fe New package to read/write a subset of Liberty for STA. 2012-08-29 16:20:39 -07:00
Alan Mishchenko bebd7ee6cb New package to read/write a subset of Liberty for STA. 2012-08-29 00:48:36 -07:00
Alan Mishchenko 5ff49be993 Ensured that SC mapped network is always in a topo order. 2012-08-28 19:42:53 -07:00
Alan Mishchenko 9b02fe59bd Added buffering based on combinational merging. 2012-08-28 19:24:13 -07:00
Alan Mishchenko 7772a4af05 Added printout of library cells. 2012-08-27 19:58:15 -07:00
Alan Mishchenko da6838463f Added features 'map -M <float>' to control the use of large gates. 2012-08-27 14:29:32 -07:00
Alan Mishchenko 9abe8b66c9 New package to read/write a subset of Liberty for STA. 2012-08-27 13:50:33 -07:00
Alan Mishchenko 1ba1e6574c New package to read/write a subset of Liberty for STA. 2012-08-26 17:32:22 -07:00
Alan Mishchenko 95e14cd72c Select for mapping smallest-area gates for each functionality. 2012-08-26 17:31:23 -07:00
Alan Mishchenko 889ed19c1c Compiler warnings. 2012-08-26 09:31:43 -07:00
Alan Mishchenko dfd6ab0823 New package to read/write a subset of Liberty for STA. 2012-08-25 19:00:26 -07:00
Alan Mishchenko 19d50b98a1 New package to read/write a subset of Liberty for STA. 2012-08-25 12:34:54 -07:00
Alan Mishchenko 13bd7b334c New package to read/write a subset of Liberty for STA. 2012-08-24 21:31:46 -07:00
Alan Mishchenko bb68d0b7f6 Removed unused files from the project. 2012-07-25 12:42:25 -07:00
Alan Mishchenko aa78ce56e7 Updated code for lazy man's synthesis. 2012-07-20 11:52:51 -07:00
Alan Mishchenko 96d7699698 Updated code for lazy man's synthesis. 2012-07-15 15:54:36 -07:00
Alan Mishchenko 908d5e696c Replacing Mb/Gb to be MB/GB. 2012-07-09 22:57:03 -07:00
Alan Mishchenko 1c33107cbb Updating project settings to have simpler include paths. 2012-07-07 20:14:12 -07:00
Alan Mishchenko ea98a2497e Fixing time primtouts throughout the code. 2012-07-07 18:41:02 -07:00
Alan Mishchenko 4760983a46 Fixing time primtouts throughout the code. 2012-07-07 18:15:08 -07:00
Alan Mishchenko 3aab724573 Fixing time primtouts throughout the code. 2012-07-07 17:46:54 -07:00
Alan Mishchenko 7629fd6aea Added min-cut-based refinement of gate-level abstraction (command &gla_refine). 2012-06-24 18:45:42 -07:00
Alan Mishchenko 2f1f0ac93d Minor change to prevent assertion failure when verifying required times. 2012-06-15 08:45:12 -07:00
Alan Mishchenko 034fc5a14d Misc changes. 2012-05-21 23:52:05 +07:00
Alan Mishchenko 77b83074e0 Changing 'if' to allow for delay optimization on sequential paths only. 2012-05-20 22:18:23 +07:00
Alan Mishchenko c6af9094c0 Changing 'if' to allow for delay optimization on sequential paths only. 2012-05-20 17:27:53 +07:00
Alan Mishchenko d4399dbf92 Misc changes. 2012-05-03 19:54:40 +08:00
Alan Mishchenko 490e84c4bc Adding on-the-fly truth-table minimization. 2012-04-28 12:09:38 +07:00
Alan Mishchenko b8088b901d Misc changes. 2012-04-22 23:33:50 -07:00
Alan Mishchenko 85f6d2526e Bug fix in SOP balancing with structural choices. 2012-04-12 20:19:47 -07:00
Alan Mishchenko 5de8e60b9f Improving printouts of critical path. 2012-04-06 12:52:26 -07:00
Alan Mishchenko 8c1513dfbc Improving printouts of critical path. 2012-04-06 00:45:58 -07:00
Alan Mishchenko a21f2986aa Enabling mapping into multi-input AND/OR gates. 2012-03-27 20:15:02 -07:00
Alan Mishchenko b584fea24a Bug fix in the mapper: using an object after it is deleted. 2012-03-24 11:52:13 -07:00
Alan Mishchenko 0792ab0eb6 Additional features for delay optimization 2012-03-21 23:19:49 -07:00
Alan Mishchenko c347f2b90b Alternative way of computing delay in SOP balancing. 2012-03-16 15:43:08 -07:00
Alan Mishchenko 2c8f1a67ec Renamed Aig_ManForEachPi/Po to be ...Ci/Co and Aig_ObjCreatePi/Po to be ...Ci/Co. 2012-03-09 19:32:44 -08:00
Alan Mishchenko eb4aa42577 Enabling user-specified required times in 'map'. 2012-03-02 13:50:28 -08:00
Alan Mishchenko a0933b1643 Adding switch -N to 'super' to set an upper bound on the number of supergates generated. 2012-03-02 13:49:49 -08:00
Alan Mishchenko 7e805e5c9a Making GENLIB parser skip LATCHes. 2012-03-02 11:48:13 -08:00
Alan Mishchenko 2b39d60f6e Adding switch -N to 'super' to set an upper bound on the number of supergates generated. 2012-03-01 11:18:35 -08:00
Alan Mishchenko b90f1c73ae Adding switch -N to 'super' to set an upper bound on the number of supergates generated. 2012-02-29 16:44:16 -08:00
Alan Mishchenko b30791ba62 Updating 'print_library' to write GENLIB library into a file. 2012-02-29 16:43:28 -08:00
Alan Mishchenko d548040437 Bug fix in a standard cell library generator. 2012-02-29 16:15:31 -08:00
Alan Mishchenko 4b647de7fd Bug fix in a standard cell library generator. 2012-02-29 15:59:18 -08:00
Alan Mishchenko a87a3b4e33 Bug fix in stadard cell library representation. 2012-02-23 11:58:59 -08:00
Alan Mishchenko 99e7d1d193 Bug fix in stadard cell library representation. 2012-02-23 10:24:01 -08:00
Alan Mishchenko 1d25ae3b1a Experiment with technology mapping. 2012-02-22 17:54:24 -08:00