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1932 Commits

Author SHA1 Message Date
Alan Mishchenko abc54a2d20 Changing static to extern for two procedures. 2021-10-17 20:52:20 -07:00
Alan Mishchenko d514029e34 Experiments with SAT solving. 2021-10-09 15:16:18 -07:00
Alan Mishchenko 227b0c775b New command &stochsyn for stochastic synthesis. 2021-10-06 20:33:41 -07:00
Alan Mishchenko ba64e78608 Changing declaration of Vec_Ptr_t sorting function to satisfy some compilers. 2021-09-26 11:30:54 -07:00
Alan Mishchenko 787dbb9433 Two rare corner-case bugs in &if mapper. 2021-09-26 11:05:48 -07:00
Alan Mishchenko cc13d1fb47 Adding command &reshape. 2021-09-21 10:50:10 -07:00
Alan Mishchenko 1e69e7e7d1 Adding command &reshape. 2021-09-21 10:22:40 -07:00
Alan Mishchenko a363256098 Removing unused command. 2021-09-21 10:08:04 -07:00
Alan Mishchenko e2f1548217 Various changes. 2021-09-21 10:00:46 -07:00
Alan Mishchenko 6ca31c475f Improving MiniAIG and name manager. 2021-09-16 21:51:10 -07:00
Alan Mishchenko c557272241 Enable command 'pipe' for pipelining. 2021-09-13 09:44:28 -07:00
Alan Mishchenko bafd2a7820 Disabling command print_mint when CUDD is not used. 2021-09-07 19:40:57 -07:00
Alan Mishchenko 14dc389e62 Bug fix in the timing manager. 2021-09-06 09:53:49 -07:00
Alan Mishchenko e7a029d73f Various changes. 2021-09-04 19:21:59 -07:00
Alan Mishchenko a718318740 Various changes. 2021-09-02 22:54:19 -07:00
Alan Mishchenko 388255e557 Allow &mfs to work on sequential AIGs. 2021-08-24 14:51:24 -07:00
Alan Mishchenko 85a94766a6 Compiler warnings. 2021-08-23 19:56:26 -07:00
Alan Mishchenko 625ccde611 Support of pair-wise miter and other changes. 2021-08-22 13:05:28 -07:00
Alan Mishchenko 77760dd8ac Extending &trim to trim structurally equivalent primary outputs. 2021-08-19 09:48:46 -07:00
Alan Mishchenko 4da6cc8904 Improving AIG to Verilog converter. 2021-08-17 16:52:29 -07:00
Alan Mishchenko e9b487666d Suggested changes to collect and pass timing information (unused variable). 2021-08-12 18:27:40 -07:00
Alan Mishchenko 0deb8bf632 Suggested changes to collect and pass timing information (compiler issues). 2021-08-12 18:26:37 -07:00
Alan Mishchenko e8ac47641f Suggested changes to collect and pass timing information. 2021-08-12 18:25:00 -07:00
Alan Mishchenko 99ab99bfa6 Making &cec support the miter circuit. 2021-08-05 15:05:59 -07:00
Alan Mishchenko ab29dad7f4 Adding node ordering options to command &dfs. 2021-08-05 11:07:16 -07:00
Alan Mishchenko 5f8d4e72d1 Experiments with LUT mapping for small functions. 2021-08-02 16:46:56 -07:00
Alan Mishchenko 4cf906d2fc Experiments with LUT mapping for small functions. 2021-08-01 12:13:27 -07:00
Alan Mishchenko 692dd76319 Upgrading choice computation. 2021-07-31 15:34:46 -07:00
Alan Mishchenko d925e4802c Experiments with cofactoring. 2021-07-31 11:30:19 -07:00
Alan Mishchenko a162b1f47a Experimental simulation commands. 2021-07-25 14:11:34 -07:00
Alan Mishchenko 62180f3576 Command to move CI/CO names. 2021-07-16 13:46:41 -07:00
Alan Mishchenko 6e5a797a6d Command to move CI/CO names. 2021-07-16 13:44:38 -07:00
Alan Mishchenko 3e67d167f5 Experiments with LUT mapping for small functions. 2021-07-13 19:05:02 -07:00
Alan Mishchenko 9fac6c7a8b Experiments with CEC. 2021-07-10 10:50:33 -07:00
Alan Mishchenko 5a135c8799 Experiments with MUX decomposition. 2021-07-08 21:42:15 -07:00
Alan Mishchenko 28ba2c5213 Adding place holder file for resub experiments. 2021-06-24 19:18:28 -07:00
Alan Mishchenko b4f099c511 Experiments with LUT mapping for small functions. 2021-06-19 19:26:41 -07:00
Alan Mishchenko 7d18d6b7aa Experiments with cut computation. 2021-06-05 17:48:12 -07:00
Alan Mishchenko 84ec53fbf9 Disabled special handling of 2-input LUTs. 2021-06-03 08:39:30 -07:00
Alan Mishchenko 49078ffebf Updating LUT synthesis code. 2021-05-25 23:12:30 -07:00
Alan Mishchenko d35b05859c Adding command &extract. 2021-05-18 16:42:16 -07:00
Alan Mishchenko 0ce11851bc Updating LUT synthesis code. 2021-05-16 20:33:53 -07:00
Alan Mishchenko 610a3d3fc2 Adding switch muxes -a to create networks of ADDs. 2021-05-15 13:28:06 -07:00
Alan Mishchenko ed13c6d4d2 Updating LUT synthesis code. 2021-05-11 17:45:20 -07:00
Alan Mishchenko e6a47c3e41 Disable cube-sort when deriving SOPs. 2021-05-11 15:54:43 -07:00
Alan Mishchenko aa9fe1f240 Updating LUT synthesis code. 2021-05-11 15:04:15 -07:00
Alan Mishchenko 76bed2055c Updating LUT synthesis code. 2021-05-08 20:10:44 -07:00
Alan Mishchenko 17476146ca Fixing mismatch in &cec -x which should return undecided rather than non-equivalent when the miter cannot be reduced to constant 0. 2021-05-08 19:07:10 -07:00
Alan Mishchenko 7d90895dcf Experiments with LUT mapping for small functions. 2021-05-01 22:44:29 -07:00
Alan Mishchenko 9b75906740 Several changes for standard mapping. 2021-04-28 00:11:02 -07:00