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5,271 Commits 27 Branches 57 Tags 58 MiB
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176 Commits

Author SHA1 Message Date
aletempiac 8aa57c5d54 Decisions on late arrival 2023-11-16 18:53:02 +01:00
aletempiac 66cdd36d20 Runtime improvements in decomposition 2023-11-15 19:03:29 +01:00
aletempiac 1632dc0d4e First version of ACD 2023-11-15 18:38:00 +01:00
Alan Mishchenko 6ca7eab466 Prototype of integrating decomposition into "if". 2023-11-14 12:58:03 -08:00
Alan Mishchenko 813a0f1ff1 Updating features of &if mapper. 2022-10-09 23:51:40 -07:00
Alan Mishchenko 8888e8e82e Experiments with the mapper. 2022-06-23 07:48:10 -07:00
Alan Mishchenko 21922e3e9f Adding switch to dsd_match to skip small functions. 2022-05-18 10:43:07 -07:00
Alan Mishchenko b292595062 Adding switch to &if to consider special type of 6-input cuts. 2019-09-26 14:05:16 -07:00
Alan Mishchenko 390adc39ca Making &mfs work with boxes larger than 6 inputs. Adding option &if -w to print delay profile. 2019-09-19 16:49:36 -07:00
Alan Mishchenko 01569b8f5f Fixing some warnings by adding cast from 'int' to 'size_t' in memset, memcpy, etc. 2019-03-05 15:57:50 -08:00
Alan Mishchenko 7e9f3f027b Adding parameters and improvements to %blast. 2018-02-28 18:45:44 -08:00
Alan Mishchenko accf4825e5 Adding API to dump MiniAIG into a Verilog file and other small changes. 2017-10-22 15:44:13 -07:00
Alan Mishchenko 287f9efcce Maintenance and updates. 2017-09-20 19:27:46 -07:00
Alan Mishchenko 3a1032c151 Maintenance and updates. 2017-09-18 08:27:05 -07:00
Alan Mishchenko 693b587c5c Adding truth table occurrence counters for 'if -c'. 2016-08-08 18:20:05 -07:00
Alan Mishchenko a819e33c6f Enabled delay computation for the cut output using cut inputs. 2016-08-08 12:36:10 -07:00
Alan Mishchenko fb33d69db8 Infrastructure for using the results of exact SAT-based synthesis during mapping. 2016-07-29 16:03:42 -07:00
Alan Mishchenko 53e8647719 Adding option to rehash AIG after mapping. 2016-04-27 18:33:23 -07:00
Alan Mishchenko 2c37498bfb Compiler warnings. 2015-10-21 23:53:42 -07:00
Alan Mishchenko 0145b0ca72 Moving BDD-based threshold function detection to the BDD part of the code. 2015-10-16 18:34:06 -07:00
Alan Mishchenko 0e4561ab9f Experiments with mapping plus small changes. 2015-08-23 20:38:55 -07:00
Alan Mishchenko 10e0f3c58d Small changes to enable collecting results using &ps -D file. 2015-07-09 11:50:24 -07:00
Alan Mishchenko d0d7763ef8 Supporting AND-gate cuts in 'if' and '&if' 2015-06-21 13:31:02 -07:00
Alan Mishchenko 56f783157a Support for representing programmable cell configuration data. 2015-03-08 20:17:59 -07:00
Alan Mishchenko b379b3ee20 Adding new mapping feature. 2014-12-11 20:45:41 -08:00
Alan Mishchenko e4d5887671 Detection of threshold functions. 2014-10-08 10:41:20 -07:00
Alan Mishchenko 24083998ab Deriving cell mapping with &if -kz. 2014-10-04 19:18:34 -07:00
Alan Mishchenko fa5f05e3a2 Deriving AIG after cell mapping. 2014-10-03 17:15:43 -07:00
Alan Mishchenko 1fb65889a3 Updating command 'dsd_clean'. 2014-09-20 13:56:26 -07:00
Alan Mishchenko b05ee94311 Improvements to Boolean matching. 2014-09-19 14:06:51 -07:00
Alan Mishchenko 69699da912 Improvements to Boolean matching. 2014-09-18 16:44:04 -07:00
Alan Mishchenko a0ed347992 Improving DSD manager. 2014-09-18 14:50:08 -07:00
Alan Mishchenko 043cfcd775 Concurrency for Boolean matching. 2014-09-18 11:46:14 -07:00
Alan Mishchenko 023e92c470 Improvements to Boolean matching. 2014-09-17 18:58:20 -07:00
Alan Mishchenko c0aa9b6a5d Adding new command &sopb for resource-aware SOP balancing. 2014-07-21 13:49:25 -07:00
Alan Mishchenko 78e09e9119 Correcting switching activity computation. 2014-06-05 17:00:04 -07:00
Alan Mishchenko 606fed3b84 Added optimization for average rather than maximum delay. 2014-04-19 19:57:32 -07:00
Alan Mishchenko d0c4c0cd7b Improvements to DSD balancing. 2014-04-19 16:55:44 -07:00
Alan Mishchenko 17f989ccba Fix SOP balancing. 2014-04-19 14:12:09 -07:00
Alan Mishchenko 6730e21e12 Improvements in technology mapping. 2014-04-17 13:09:08 -07:00
Alan Mishchenko 02cf869391 Changes in the LUT mapper data-structures. 2014-04-14 09:06:14 -05:00
Alan Mishchenko 865526f880 New feature to optimize delay during mapping. 2014-04-11 12:20:36 -07:00
Alan Mishchenko e855eaa080 Improvements to DSD in technology mapping. 2014-04-11 12:01:36 -07:00
Alan Mishchenko 80110cc328 New feature to optimize delay during mapping. 2014-04-11 11:01:54 -07:00
Alan Mishchenko 24f63cf92c Correcting internal check. 2014-04-11 09:53:19 -07:00
Alan Mishchenko b50894ab64 Removed obsolete code for sequential mapping. 2014-04-11 09:17:34 -07:00
Alan Mishchenko b9274a07de Improvements to DSD in technology mapping. 2014-04-11 08:57:03 -07:00
Alan Mishchenko af6705a8b1 Implementation of DSD balancing. 2014-04-06 21:22:10 -07:00
Alan Mishchenko a26d61f47d Improvement in SOP balancing. 2014-04-06 15:21:07 -07:00
Alan Mishchenko 9c502b70f3 Preparing new implementation of SOP/DSD balancing in 'if' mapper. 2014-04-05 22:51:01 -07:00