luke
/
abc
mirror of https://github.com/YosysHQ/abc.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
5,579 Commits 27 Branches 57 Tags 58 MiB
Commit Graph

5579 Commits

Author SHA1 Message Date
MyskYko 323229a438 fix build 2023-05-02 17:27:01 -07:00
MyskYko ce3843ec8c fix enum 2023-05-02 17:08:02 -07:00
MyskYko 13b0d17169 abc cxx namespace 2023-05-02 17:02:04 -07:00
MyskYko 6e985705fc transduction 2023-05-02 16:48:33 -07:00
Alan Mishchenko eff805a644 Bug fix in choice computation. 2023-04-28 08:02:04 -04:00
Andrey Rogov d785775f64 1. Fix bug (using pDesign without check if == NULL) 
2. Switch type of variables containing file size to (int => long)
 2023-04-28 01:52:01 +03:00
Henner Zeller dfd8fabdd7 Don't #define _DEFAULT_SOURCE if already defined. 2023-04-27 13:44:13 -07:00
Alan Mishchenko cc6834d4cc Unifying random number generation. 2023-04-27 15:40:34 -04:00
Alan Mishchenko b417061535 Updating VS Studio project file. 2023-04-25 13:21:22 -04:00
Alan Mishchenko 65a756bf01 Command to write the network into an edgelist file, contributed by Cunxi Yu (University of Utah). 2023-04-25 12:58:59 -04:00
Alan Mishchenko 1a91797316 Trying to fix a spurious build error. 2023-04-22 19:17:56 -07:00
Alan Mishchenko 9f4ab5a2c1 Bug fix in SAT sweeping. 2023-04-22 18:37:21 -07:00
Alan Mishchenko b633363f06 Trying to fix a spurious build error. 2023-04-04 10:43:01 +08:00
Alan Mishchenko eaa9da53cd Various unrelated changes. 2023-04-04 10:28:07 +08:00
Alan Mishchenko 36a83acf3c Experiments with sequential mapping. 2023-03-31 19:52:46 +07:00
Alan Mishchenko 08d25f39f2 Various unrelated changes. 2023-03-26 08:15:45 +07:00
Alan Mishchenko 41c01e4fb7 Compiler warning. 2023-03-17 09:59:57 +07:00
Alan Mishchenko 6694add40f Compiler warning. 2023-03-17 09:54:46 +07:00
Alan Mishchenko 1229d1ff07 New options to print out sim info. 2023-03-16 13:03:07 +07:00
Alan Mishchenko a5f4841486 Adding BLIF dumping to MiniAIG. 2023-03-13 20:51:40 +07:00
Alan Mishchenko 6d9c8daece Fix duplicating invs/bufs driving primary outputs in 'write_verilog'. 2023-03-11 22:28:38 +07:00
Alan Mishchenko 8ffb7811c7 New options to print out sim info (warning). 2023-03-11 20:35:23 +07:00
Alan Mishchenko c1b2a64c2e Alternative binary name on Linux. 2023-03-11 20:29:04 +07:00
Alan Mishchenko 7bc6f3396e New options to print out sim info. 2023-03-11 20:25:11 +07:00
Alan Mishchenko 953970e73a Skipping zero partial products. 2023-03-05 11:42:26 +07:00
Alan Mishchenko 9d0e828b85 Fixing compiler error. 2023-03-01 19:12:06 +07:00
Alan Mishchenko 3370370101 Adding switch 'show -d' to keep (not delete) the .dot file after generating the .ps file. 2023-03-01 19:00:44 +07:00
Alan Mishchenko a79dc18eb2 Enabling generation of non-restoring divider. 2023-03-01 18:41:24 +07:00
Alan Mishchenko 8742534db8 More compiler warnings. 2023-03-01 01:12:36 -08:00
alanminko 91aaff2575 More compiler warnings. 2023-02-28 03:07:41 -08:00
Alan Mishchenko 667326b18e Compiler warnings. 2023-02-28 15:53:12 +07:00
Alan Mishchenko 622d142794 Compiler warnings. 2023-02-28 15:40:06 +07:00
Alan Mishchenko b57b546494 Compiler warnings. 2023-02-28 15:16:31 +07:00
Alan Mishchenko 0d0063f7de Experiment with cost functions. 2023-02-28 13:50:35 +07:00
Catherine 2c1c83f75b
Merge pull request #21 from xobs/cast-unsigned-signed 
casts: add casts for unsigned -> signed int
 2023-02-23 01:47:15 +00:00
Catherine 0551ef2a68
Merge pull request #22 from YosysHQ/wasi-Abc_Clock 
Add WASI support in Abc_Clock
 2023-02-23 01:46:53 +00:00
Catherine f89df8087d Add WASI support in Abc_Clock. 2023-02-23 01:14:48 +00:00
Alan Mishchenko 581c58b9c4 Experiment with choice computation. 2023-02-16 07:14:18 +01:00
Sean Cross 3f9b46591c casts: add casts for unsigned -> signed int 
When compiling on Darwin ARM64 hardware using the Conda clang compiler,
compilation fails due to these casts going from `unsigned` to `int`.

In these cases, a cast appears to be the correct approach. Add a cast
to make the compiler happy.

Signed-off-by: Sean Cross <sean@xobs.io>
 2023-02-15 22:58:24 +08:00
Alan Mishchenko 38ad178e9e Changes and bug fixes in exact synthesis. 2023-02-13 06:39:10 +01:00
Alan Mishchenko bbd0640db2 Enable 'scorr' when AIG has no internal nodes. 2023-02-09 16:15:48 -08:00
Alan Mishchenko 1aecc3373c New command to compute the range of output values. 2023-02-08 15:54:38 -08:00
Alan Mishchenko aa4cada268 Experiments with multiplier generation (linker problem). 2023-02-08 14:49:42 -08:00
Alan Mishchenko 688be5719e Experiments with multiplier generation. 2023-02-08 14:37:38 -08:00
Alan Mishchenko ea0f22de4d Bug fix in &mfs. 2023-02-08 00:25:17 -08:00
Alan Mishchenko 110bac4394 Improvement in truth table printout. 2023-02-08 00:24:43 -08:00
Alan Mishchenko c899a4cb3b Experiments with multipliers. 2023-02-08 00:24:04 -08:00
Alan Mishchenko fa58597321 Updating mfs2 and &mfs to work with larger nodes. 2023-02-05 14:44:44 -08:00
Alan Mishchenko e7ecaee92d Bug fix in supergate generation. 2023-02-05 14:41:18 -08:00
Catherine a8f0ef2368
Merge pull request #20 from YosysHQ/wasi-Exa4_ManSolve 
Add WASI support in Exa4_ManSolve
 2023-02-04 03:34:04 +00:00