UberDDR3/rtl
AngeloJacobo c0bc4ca48a removed extra semicolon 2025-03-02 18:46:07 +08:00
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axi update UberDDR3 AXI for Vivado custom IP 2025-02-16 14:53:05 +08:00
ecc Revert "add self-refresh option, passing Simulation, ongoing formal" 2024-11-23 11:43:05 +08:00
spd added simulation and project demo with XADC 2025-01-12 14:55:43 +08:00
ddr3_controller.v removed extra semicolon 2025-03-02 18:46:07 +08:00
ddr3_phy.v fix flagged errors from openxc7 (shiftin grounded, iodelay_group string) 2025-03-02 18:40:18 +08:00
ddr3_top.v uncommented default_nettype 2025-03-01 19:32:35 +08:00