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UberDDR3
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uncommented default_nettype

This commit is contained in:
AngeloJacobo 2025-03-01 19:32:35 +08:00
parent e19c6023c4
commit 5c52351bce
3 changed files with 3 additions and 3 deletions
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2
rtl/ddr3_controller.v
View File

@ -38,7 +38,7 @@
// Comments are continuously added on this RTL for better readability
//`define FORMAL_COVER //skip reset sequence during formal verification to fit in cover depth
// `default_nettype none
`default_nettype none
`timescale 1ps / 1ps
//
// speed bin

2
rtl/ddr3_phy.v
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@ -28,7 +28,7 @@
//
////////////////////////////////////////////////////////////////////////////////
// `default_nettype none
`default_nettype none
`timescale 1ps / 1ps
//`define DEBUG_DQS // uncomment to route the raw DQS to output port for debugging

2
rtl/ddr3_top.v
View File

@ -27,7 +27,7 @@
//
////////////////////////////////////////////////////////////////////////////////
//`default_nettype none
`default_nettype none
`timescale 1ps / 1ps
module ddr3_top #(