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UberDDR3
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UberDDR3/example_demo/enclustra_kx2_st1
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AngeloJacobo 117a9c5837 update enclustra demo project 2025-03-14 13:56:24 +08:00
..
ddr3_test_monitor_axi_1.0 uberddr3 test on enclustra board, with MicroBlaze for summary reporting via UART 2025-02-13 19:27:11 +08:00
Makefile add makefile for openxc7 run (NOT YET WORKING) 2024-10-13 16:44:29 +08:00
clk_wiz.v all example demos passing openxc7 run! 2025-03-02 18:42:49 +08:00
ddr3_test.c solve timing slack due to 64-bit counters 2025-02-27 20:28:55 +08:00
ddr3_test.v solve timing slack due to 64-bit counters 2025-02-27 20:28:55 +08:00
ddr3_test_top.v uberddr3 test on enclustra board, with MicroBlaze for summary reporting via UART 2025-02-13 19:27:11 +08:00
ddr3_test_top_tb.v uberddr3 test on enclustra board, with MicroBlaze for summary reporting via UART 2025-02-13 19:27:11 +08:00
enclustra_ddr3.bit update enclustra demo project 2025-03-14 13:56:24 +08:00
enclustra_ddr3.v update enclustra demo project 2025-03-14 13:56:24 +08:00
enclustra_ddr3.xdc all example demos passing openxc7 run! 2025-03-02 18:42:49 +08:00
enclustra_mb.xdc add xdc for microblaze run, and minor fixes in params 2025-02-22 11:23:24 +08:00
uart_rx.v add makefile for openxc7 run (NOT YET WORKING) 2024-10-13 16:44:29 +08:00
uart_tx.v add makefile for openxc7 run (NOT YET WORKING) 2024-10-13 16:44:29 +08:00