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added sby file for formal verif

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Angelo Jacobo 2023-03-02 20:11:10 +08:00 committed by GitHub
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commit 6b9607563e
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1 changed files with 13 additions and 0 deletions
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ddr3_controller.sby Normal file
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[options]
mode prove
[engines]
smtbmc
[script]
read -formal ddr3_controller.v
prep -top ddr3_controller
[files]
./rtl/ddr3_controller.v
./rtl/ddr3_parameters.vh