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OpenSTA/network
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Jaehyun Kim ce45133c84 test: Fix wrong API calls in Tcl tests and remove unnecessary catches 
Replace wrong/non-existent command calls with correct OpenSTA APIs:
- sta::pin_slack → get_property $pin slack_max_rise
- sta::slow_drivers_cmd → sta::slow_drivers
- set_latch_borrow_limit → set_max_time_borrow
- remove_data_check → unset_data_check
- remove_clock → delete_clock
- reset_path → unset_path_exceptions
- sta::report_path_end 3-arg → sta::report_path_end2
- sta::design_power "NULL" → sta::design_power [sta::cmd_corner]
- report_path $path → sta::report_path_cmd $path
- connect_pin 3-arg → connect_pin net inst/port
- set_power_activity positional → -input_ports flag
- sta::is_clock [get_ports] → sta::is_clock [sta::get_port_pin]
- get_property $inst lib_name → liberty_cell/liberty_library
- get_property $pin net_name → [$pin net] + get_full_name
- get_property $net is_power → $net is_power method
- Removed unnecessary catch around sta::write_liberty

23 catch blocks removed. Tests now execute real API calls instead
of silently failing.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
 		2026-02-20 15:32:08 +09:00
..
test test: Fix wrong API calls in Tcl tests and remove unnecessary catches 2026-02-20 15:32:08 +09:00
ConcreteLibrary.cc liberty bundle ports apply func's to members resolves #256 2025-06-16 16:45:21 +02:00
ConcreteNetwork.cc replace_cell w/spef memory issue 2025-12-02 14:29:55 -08:00
HpinDrvrLoad.cc update copyright 2025-01-21 18:54:33 -07:00
Link.tcl update copyright 2025-01-21 18:54:33 -07:00
Network.cc set_min/max_delay -from reg/D startpoint warning resolves #265 2025-07-03 17:08:44 -07:00
Network.i Verilog make pins for liberty pg_pins resolves #326 2025-11-07 11:55:43 -07:00
Network.tcl liberty bundle ports apply func's to members resolves #256 2025-06-16 16:45:21 +02:00
NetworkCmp.cc update copyright 2025-01-21 18:54:33 -07:00
NetworkEdit.i update copyright 2025-01-21 18:54:33 -07:00
NetworkEdit.tcl update copyright 2025-01-21 18:54:33 -07:00
ParseBus.cc update copyright 2025-01-21 18:54:33 -07:00
PortDirection.cc update copyright 2025-01-21 18:54:33 -07:00
SdcNetwork.cc spef support net missing divider escape resolves #311 2025-10-14 15:58:48 -07:00
VerilogNamespace.cc remove using std from headers 2025-04-11 16:59:48 -07:00