c72a42e827
Add meaningful verification to liberty ECSM, sky130 corners, writer, and roundtrip tests. Expand verilog specify, escaped-write, remove-cells, write, and writer tests with content checks, roundtrip validation, and error guards. Update corresponding .ok golden files. Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com> Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com> |
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| .. | ||
| test | ||
| Verilog.i | ||
| Verilog.tcl | ||
| VerilogLex.ll | ||
| VerilogParse.yy | ||
| VerilogReader.cc | ||
| VerilogReader.hh | ||
| VerilogReaderPvt.hh | ||
| VerilogScanner.hh | ||
| VerilogWriter.cc | ||