Remove unnecessary catch blocks across all test modules (graph,
liberty, network, parasitics, power, sdc, sdf, search, spice,
verilog), expand C++ tests (TestSearchIncremental 8→36 tests,
TestPower 71→96, TestSpice 98→126), add report_checks after each
set_wire_load_model in liberty_wireload.tcl, and rewrite
liberty_sky130_corners.tcl with actual multi-corner timing analysis.
Co-Authored-By: Claude Opus 4.6 <[email protected]>
Jaehyun KimandClaude Opus 4.6
5c9b4d7a15