126 lines
4.6 KiB
Plaintext
126 lines
4.6 KiB
Plaintext
--- Test 1: write bus design ---
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cells: 12
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nets: 19
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ports: 11
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--- Test 2: roundtrip bus design ---
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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roundtrip cells: 12
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roundtrip nets: 19
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roundtrip ports: 11
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roundtrip data_in[*]: 4
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roundtrip data_out[*]: 4
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Startpoint: data_in[0] (input port clocked by clk)
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Endpoint: reg0 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 v input external delay
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0.00 0.00 v data_in[0] (in)
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0.06 0.06 v buf0/Z (BUF_X1)
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0.03 0.08 v and0/ZN (AND2_X1)
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0.00 0.08 v reg0/D (DFF_X1)
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0.08 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ reg0/CK (DFF_X1)
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-0.04 9.96 library setup time
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9.96 data required time
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---------------------------------------------------------
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9.96 data required time
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-0.08 data arrival time
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---------------------------------------------------------
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9.88 slack (MET)
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--- Test 3: write complex bus design ---
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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--- roundtrip complex bus ---
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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complex roundtrip cells: 28
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complex roundtrip ports: 27
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roundtrip data_a[*]: 8
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roundtrip data_b[*]: 8
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roundtrip result[*]: 8
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Startpoint: data_a[6] (input port clocked by clk)
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Endpoint: carry (output port clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 v input external delay
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0.00 0.00 v data_a[6] (in)
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0.06 0.06 v buf_a6/Z (BUF_X1)
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0.03 0.09 v and6/ZN (AND2_X1)
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0.05 0.13 v or_carry/ZN (OR2_X1)
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0.02 0.16 v buf_carry/Z (BUF_X1)
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0.00 0.16 v carry (out)
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0.16 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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0.00 10.00 output external delay
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10.00 data required time
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---------------------------------------------------------
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10.00 data required time
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-0.16 data arrival time
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---------------------------------------------------------
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9.84 slack (MET)
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--- Test 4: write hierarchical design ---
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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hier roundtrip cells: 7
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hier roundtrip nets: 11
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hier roundtrip ports: 6
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Startpoint: in1 (input port clocked by clk)
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Endpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 v input external delay
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0.00 0.00 v in1 (in)
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0.06 0.06 v buf_in/Z (BUF_X1)
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0.03 0.08 v sub1/and_gate/ZN (AND2_X1)
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0.02 0.11 v sub1/buf_gate/Z (BUF_X1)
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0.02 0.13 v sub2/and_gate/ZN (AND2_X1)
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0.03 0.16 v sub2/buf_gate/Z (BUF_X1)
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0.01 0.17 ^ inv1/ZN (INV_X1)
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0.00 0.17 ^ reg1/D (DFF_X1)
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0.17 data arrival time
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10.00 10.00 clock clk (rise edge)
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0.00 10.00 clock network delay (ideal)
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0.00 10.00 clock reconvergence pessimism
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10.00 ^ reg1/CK (DFF_X1)
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-0.03 9.97 library setup time
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9.97 data required time
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---------------------------------------------------------
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9.97 data required time
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-0.17 data arrival time
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---------------------------------------------------------
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9.80 slack (MET)
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--- Test 5: write supply/tristate design ---
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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--- Test 6: write constant design ---
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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Warning: ../../test/nangate45/Nangate45_typ.lib line 37, library NangateOpenCellLibrary already exists.
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const roundtrip cells: 8
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const roundtrip nets: 14
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