8a46208c4d
Fixes constant integer verilog parsing
...
Fixes parsing attributes of the form
```systemverilog
(* bottom_bound = 1'sh0 *)
sky130_fd_sc_hd__dfrtp_1 _1415_ (
.CLK(clk),
.D(in),
.Q(out),
.RESET_B(reset)
);
```
In particular "supporting" the signed indicator.
Co-authored-by: Mike Inouye <mikeinouye@google.com>
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-10-08 20:40:07 +00:00
414e4e44aa
Initial Pass at Attribute parsing
2024-03-09 22:02:19 +00:00
422a5819bd
update copyright
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-01-11 16:34:49 -08:00
cc2ef1783f
update copyright
...
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2023-02-18 17:55:40 -07:00
5d45a07e34
liberty pin names with brackets and .'s
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2023-02-18 17:20:40 -07:00
2bc6e8f68c
update copyright
...
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2022-01-04 10:17:08 -07:00
2e8f0035dc
update copyright
2021-06-25 10:25:49 -07:00
b4851a6c7d
flex disable register decls
2020-11-11 08:32:25 -07:00
c9296a0d1f
disable flex register warnings
2020-11-09 21:11:29 -07:00
7d31cfac8f
flex disable register declarations
2020-09-17 05:50:12 -07:00
ee326f165c
public headers in include/sta
2020-04-05 14:53:44 -07:00
804953e317
mv public headers to include/sta
2020-04-05 11:35:51 -07:00
4a017e86eb
update copyright
2020-03-06 18:50:37 -08:00
1068813b59
UseSWIG cmake support for swig
2020-01-25 10:38:03 -07:00
344394de29
link_design use verilog library to lookup top
2019-06-26 16:01:58 -07:00
9e5aac37f4
cmake, write_path_spice
2019-01-03 16:14:15 -08:00
b075ccc783
update copyright
2019-01-01 12:26:11 -08:00
e9bde796ec
2018/11/08 corners > 2 causes internal error, 2018/11/09 Verilog ignore attributes (* blah *)
2018-11-09 10:04:16 -08:00
1154fb89fd
and then there was light...
2018-09-28 08:54:21 -07:00
Ethan Mahintorabi
James Cherry