Commit Graph

111 Commits

Author SHA1 Message Date
James Cherry e5c9bc43fd 2.0.10 2019-03-12 17:25:53 -07:00
James Cherry 92f4968feb write_path_spice bug fixes 2019-01-20 09:44:24 -08:00
James Cherry 316742202f sync 2019-01-16 15:37:31 -08:00
James Cherry 3d8d088b89 sync 2019-01-05 16:09:27 -08:00
James Cherry 9e5aac37f4 cmake, write_path_spice 2019-01-03 16:14:15 -08:00
James Cherry b075ccc783 update copyright 2019-01-01 12:26:11 -08:00
James Cherry f49dc75d32 sync 2018-12-05 14:18:41 -08:00
James Cherry e9bde796ec 2018/11/08 corners > 2 causes internal error, 2018/11/09 Verilog ignore attributes (* blah *) 2018-11-09 10:04:16 -08:00
James Cherry 2af22d9331 2018/10/23 read_verilog mod inst with no ports seg fault 2018-10-23 16:24:22 -07:00
James Cherry e68203dcf4 ^/v for arc display 2018-10-02 16:20:18 -07:00
James Cherry 1154fb89fd and then there was light... 2018-09-28 08:54:21 -07:00