2018/10/23 read_verilog mod inst with no ports seg fault

2018-10-23 16:24:22 -07:00 · 2018-10-23 16:24:22 -07:00 · 2af22d9331
parent 3a46d5939f
commit 2af22d9331
2 changed files with 6 additions and 1067 deletions
--- a/doc/BugLog
+++ b/doc/BugLog
--- a/verilog/VerilogReader.cc
+++ b/verilog/VerilogReader.cc
@ -927,7 +927,8 @@ VerilogModuleInst::hasPins()
 bool
 VerilogModuleInst::namedPins()
 {
-  return pins_->size() > 0
+  return pins_
+    && pins_->size() > 0
    && (*pins_)[0]->isNamedPortRef();
 }