James Cherry
|
c078f5b684
|
Sta::deleteParasitics
|
2020-08-16 18:18:42 -07:00 |
James Cherry
|
990cf46959
|
ClkNetwork::pins(clock)
|
2020-08-10 18:31:20 -07:00 |
James Cherry
|
b36d2753d1
|
graph dcalc use ClkNetwork
|
2020-08-09 22:33:32 -07:00 |
James Cherry
|
0db8d142d8
|
ClkNetwork
|
2020-08-08 18:44:19 -07:00 |
James Cherry
|
ff7557bb1f
|
merge
|
2020-08-05 21:01:53 -07:00 |
James Cherry
|
cafb7b9152
|
reorg power headers
|
2020-07-31 09:42:24 -07:00 |
James Cherry
|
a23ba7b88e
|
power activity for internal pins
|
2020-07-30 07:55:48 -07:00 |
James Cherry
|
2ce82bd187
|
include Machine.hh in headers that use __attribute__
|
2020-07-18 19:54:10 -07:00 |
James Cherry
|
305a9bbf70
|
rm deprecated code
|
2020-07-18 09:13:17 -07:00 |
James Cherry
|
1c8f1ec9fc
|
VerilogWriter using instead of include for LibertyCell
|
2020-07-18 09:12:38 -07:00 |
James Cherry
|
a5722ae63c
|
write_verilog remove_cells use std::vector
|
2020-07-15 11:56:11 -07:00 |
James Cherry
|
4fa9e46235
|
write_verilog -remove_cells
|
2020-07-15 07:56:34 -07:00 |
James Cherry
|
f3a50663d8
|
set_data_check support mcp, 1/2 cycle path reporting
|
2020-07-13 07:38:39 -07:00 |
James Cherry
|
f60b82fee5
|
hpin clk disables without graph
|
2020-07-12 10:29:06 -07:00 |
James Cherry
|
7e71edecf2
|
separate sdc annotate/remove functions
|
2020-07-12 08:55:44 -07:00 |
James Cherry
|
a49dd870df
|
refactor sdc graph annotation
|
2020-07-11 23:56:39 -07:00 |
James Cherry
|
7653096fe6
|
Delay compare ops round2
|
2020-07-11 17:43:30 -07:00 |
James Cherry
|
9468da1ae8
|
Delay compare ops
|
2020-07-11 16:24:48 -07:00 |
James Cherry
|
b7a572cfe2
|
LibertyPort::capacitance()
|
2020-07-09 16:10:21 -07:00 |
James Cherry
|
46d2446f88
|
LibertyCell::isInverter
|
2020-07-09 08:42:52 -07:00 |
James Cherry
|
6d95ef44e5
|
SdcNetwork::location(pin)
|
2020-07-06 16:28:58 -07:00 |
James Cherry
|
2cab7b18e5
|
Network::location(pin)
|
2020-07-06 15:59:16 -07:00 |
James Cherry
|
27cc8f1614
|
report_path -format json
|
2020-07-06 15:18:13 -07:00 |
James Cherry
|
220f280c02
|
Delay*.hh protects
|
2020-07-03 12:11:23 -07:00 |
James Cherry
|
9075688077
|
set_max_delay set_output_delay set_clock_uncertainty
|
2020-06-25 13:38:47 -07:00 |
James Cherry
|
41f8a97271
|
refactor find clocks
|
2020-06-25 07:35:07 -07:00 |
James Cherry
|
07e1262186
|
report_units
|
2020-06-23 17:11:48 -07:00 |
James Cherry
|
8ff25b6c3b
|
check limits flush inits
|
2020-06-12 14:51:46 -07:00 |
James Cherry
|
4c0225acc3
|
liberty is_memory_cell
|
2020-06-09 20:02:59 -07:00 |
James Cherry
|
e138b1ce22
|
sta::checkCap
|
2020-06-09 09:43:59 -07:00 |
James Cherry
|
14cfe33bfd
|
check slew clk option
|
2020-06-08 20:37:46 -07:00 |
James Cherry
|
32adfad72e
|
liberty default_fanout_load, fanout_load for report -max_fanout
|
2020-06-08 20:11:15 -07:00 |
James Cherry
|
6b4f2cc130
|
remove set_max_transition pin support
|
2020-06-08 17:16:15 -07:00 |
James Cherry
|
4c74fcfb65
|
report -min/max fanout, capacitance
|
2020-06-02 11:08:48 -07:00 |
James Cherry
|
ee0e23c573
|
report_path -report_sigmas show incr
|
2020-05-30 18:09:14 -07:00 |
James Cherry
|
d45a28a258
|
ArrayTable save prev table when growing
|
2020-05-17 18:54:59 -07:00 |
James Cherry
|
fdb9ad44ab
|
liberty default_max_slew only applies to outputs
|
2020-05-12 17:57:04 -07:00 |
James Cherry
|
d562879a27
|
liberty bus port slew/cap/fanout limits
|
2020-05-11 07:14:36 -07:00 |
James Cherry
|
a50bbc788b
|
Sta::networkChanged
|
2020-05-06 14:12:55 -07:00 |
James Cherry
|
823f754806
|
comment
|
2020-05-03 19:33:27 -07:00 |
James Cherry
|
ad6ddc146a
|
ArrayTable leak
|
2020-05-03 19:04:09 -07:00 |
James Cherry
|
d90e568657
|
ArrayTable include
|
2020-05-03 18:45:08 -07:00 |
James Cherry
|
bcd40ad42f
|
ArrayTable don't use std::vector for thread safety
|
2020-05-03 14:35:58 -07:00 |
James Cherry
|
bb4ceacd4d
|
power use cofactor activity for internal power
|
2020-05-02 16:12:25 -07:00 |
James Cherry
|
60eaa584d4
|
power cleanup
|
2020-05-02 07:48:48 -07:00 |
James Cherry
|
3dfe27d139
|
power refactor
|
2020-05-01 21:58:25 -07:00 |
James Cherry
|
2bcd61a5df
|
report_power regressions pass
|
2020-05-01 18:40:50 -07:00 |
James Cherry
|
8b65b522fb
|
internal power
|
2020-05-01 09:40:26 -07:00 |
James Cherry
|
77d507d0a5
|
internal power
|
2020-04-28 20:32:59 -07:00 |
James Cherry
|
7e12a99f9b
|
Vertex::deletePaths()
|
2020-04-20 10:07:14 -07:00 |
James Cherry
|
f4d833f1b5
|
vertex arrivals lock
|
2020-04-19 15:23:16 -07:00 |
James Cherry
|
d50069d67e
|
merge
|
2020-04-19 10:51:59 -07:00 |
James Cherry
|
726300c6b1
|
Network virtuals
|
2020-04-17 11:07:57 -07:00 |
James Cherry
|
85e0254629
|
Report lock
|
2020-04-12 09:46:30 -07:00 |
James Cherry
|
6b86ca3b0c
|
cmake
|
2020-04-07 14:37:52 -07:00 |
James Cherry
|
5d6faea9e3
|
RegexpCompileError leak
|
2020-04-06 22:19:50 -07:00 |
James Cherry
|
1d3ae30600
|
LibertyCell::internalPowers(port)
|
2020-04-06 18:27:40 -07:00 |
James Cherry
|
9550eeea22
|
hash include cstdint
|
2020-04-05 20:02:10 -07:00 |
James Cherry
|
ec856896c7
|
verilog read/write to public includes
|
2020-04-05 16:56:38 -07:00 |
James Cherry
|
ee326f165c
|
public headers in include/sta
|
2020-04-05 14:53:44 -07:00 |
James Cherry
|
804953e317
|
mv public headers to include/sta
|
2020-04-05 11:35:51 -07:00 |
James Cherry
|
903daaceb1
|
header reorg
|
2020-04-04 17:07:43 -07:00 |